Publications

Summary: TCAD (101), DAC (62), ICCAD (64), etc.

Journal & Conference Papers

Selected Preprints

• “DreamOmni2: Multimodal Instruction-based Editing and Generation”. (arXix) (Github) (media)

• “MGM-Omni: Scaling Omni LLMs to Personalized Long-Horizon Speech”. (arXiv) (Github)

• “Grove MoE: Towards Efficient and Superior MoE LLMs with Adjugate Experts”. (arXiv)

• “DiLA: Enhancing LLM Tool Learning with Differential Logic Layer”. (arXiv)

• “On the Evaluation of Generative Models in Distributed Learning Tasks”. (arXiv)

• “Generative Distribution Distillation”. (arXiv)

Accepted

• [J169] Xiaogang Xu, Yitong Yu, Nianjuan Jiang, Jiafei Wu, Bei Yu, Jiangbo Lu, Jiaya Jia, “PVDD: A Practical Benchmark Dataset and Network for Video Denoising”, accepted by Frontiers of Computer Science.

• [J168] Peng Xu, Su Zheng, Yuyang Ye, Chen Bai, Siyuan Xu, Hao Geng, Tsung-Yi Ho, Bei Yu, “RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J167] Wendong Xu, Yuhao Ji, Yang Bai, Yueting Li, Yuxuan Zhao, Zhengwu Liu, Bei Yu, Ngai Wong, “PPD: A Portable and Highly Parallel Dispatching System for Deep Learning”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).

• [J166] Hao Ai, Liang Chen, Jianhua Zhang, Bei Yu, Wenxing Zhu, “Fast Steady-State Thermal Analysis with Separation of Variables and Discrete Cosine Transform”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J165] Mingjun Wang, Hui Wang, Feng Gu, Zizhen Liu, Jianan Mu, Shengwen Liang, Zhongkai Yu, Zheng Liang, Jun Gao, Jiaping Tang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li, “DomSim: Hardware-Aware Hybrid Fault Simulation with Dominator Tree-guided Partitioning”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J164] Hongduo Liu, Siting Liu, Zhongdong Qi, Tsung-Yi Ho, Bei Yu, “Selecting Nets to Rip Up and Reroute via SAT”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J163] Donger Luo, Qi Sun, Peng Xu, Su Zheng, Qi Xu, Tinghuan Chen, Bei Yu, Hao Geng, “Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR Metrics”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J162] Lancheng Zou, Shuo Yin, Mingjun Li, Mingzi Wang, Chen Bai, Wenqian Zhao, Bei Yu, “Oiso: Outlier-isolated Data Format for Low-bit Large Language Model Quantization”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J161] Yuyang Chen, Qi Sun, Su Zheng, Xinyun Zhang, Bei Yu, Hao Geng, “HyDAS: Hybrid Domain Deformed Attention for Selective Hotspot Detection”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J160] Jiaxi Jiang, Yuan Pu, Mingjun Li, Yuxuan Zhao, Peiyu Liao, Zuodong Zhang, Yibo Lin, Bei Yu, “RegPlace: Regularity-aware Placement for Full-System DNN Accelerator Designs”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J159] Shanyi Li, Zhen Zhuang, Mingyu Liu, Weihua Sheng, Bei Yu, Tsung-Yi Ho, “HiePlace: Efficient Hierarchical PCB Placement”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J158] Siyuan Liang, Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, “Multi-Layer Package Power/Ground Planes Synthesis with Balanced DC IR Drops: A Game-Theoretic Optimization Approach”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J157] Weiran Chen, Zaitian Chen, Bei Yu, Song Chen, Yi Kang, Qi Xu, “Real-Time Compensation Framework for Large-Scale ReRAM-Based Sparse LU Factorization”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J156] Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, Bei Yu, “PRO-TIME: Pre-routing Optimization-aware Timing Prediction via Multimodal Learning”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J155] Yuan Pu, Zhuolun He, Yuqi Jiang, Tairu Qiu, Haoyuan Wu, Qi Sun, Cheng Zhuo, Bei Yu, “Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J154] Zixiao Wang, Wenqian Zhao, Yunheng Shen, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu, “DiffPattern-Flex: Efficient Layout Pattern Generation via Discrete Diffusion”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J153] Wan-Luan Lee, Dian-Lun Lin, Shui Jiang, Cheng-Hsiang Chiu, Yibo Lin, Bei Yu, Tsung-Yi Ho, Tsung-Wei Huang, “G-kway: Multilevel GPU-Accelerated k-way Graph Partitioner using Task Graph Parallelism”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).

• [J152] Haoyang Xu, Xing Huang, Zhen Zhuang, Zhiwen Yu, Bin Guo, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D.F. Wong, “Hierarchical Partitioning-Based Inter-Chip Redistribution Layer Routing for Fan-Out Wafer-Level Packaging”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J151] Yuntao Lu, Chen Bai, Yuxuan Zhao, Ziyue Zheng, Yangdi Lyu, Mingyu Liu, Bei Yu, “DeepVerifier: Learning to Update Test Sequences for Coverage-Guided Verification”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).

• [J150] Siting Liu, Jieya Zhou, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu, Martin Wong, “Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).

2026

• [C334] Yuyang Ye, Che-Kuan Shen, Xiangfei Hu, Yuchen Liu, Shuo Yin, Xufeng Yao, Tsung-Yi Ho, Bei Yu, “LongRTL: Graph-Similarity-Guided LLM-driven Long Context RTL Optimization”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C333] Siting Liu, Peng Xu, Peiyu Liao, Keren Zhu, Yibo Lin, Bei Yu, “Submodular Maximization-inspired Adaptive Routing Bend Space Planning”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C332] Zixiao Wang, Tianshu Hou, Chenghan Wang, Zhen Zhuang, Tsung-Yi Ho, Farzan Farnia, Bei Yu, “FastRW: An Efficient Random Walk Method for Steady-State Thermal Analysis”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C331] Zixiao Wang, Jieya Zhou, Xinyun Zhang, Shoubo Hu, Farzan Farnia, Bei Yu, “DiffResist: Physics-Constrained Diffusion for Photoresist Modeling”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C330] Peng Xu, Ziyang Yu, Yuan Pu, Xinyun Zhang, Donger Luo, Hao Geng, Siyuan Xu, Tsung-Yi Ho, Bei Yu, “RATuner: Retrieval-Augmented VLSI Flow Design Parameter Tuning Framework”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C329] Su Zheng, Ziyang Yu, Bei Yu, Martin Wong, “Scalable Second-Order Optimizer for Full-Chip Inverse Lithography Techniques”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C328] Shixin Chen, Peng Xu, Yapeng Li, Tinghuan Chen, Bei Yu, “IP-Matcher: An Efficient One-to-Many Matching Framework for Analog Circuit Design and Reusing”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C327] Lancheng Zou, Sing Sen YE, Shuo Yin, Yuan Pu, Jiaxi Jiang, Siting Liu, Yuxuan Zhao, Bei Yu, “IncreMacro-3D: Incremental Macro Placement for Face-to-Face Stacked Memory-on-Logic 3D ICs”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C326] Wendong Xu, Chujie Chen, He Xiao, Kuan Li, Jing Xiong, Chen Zhang, Wenyong Zhou, Chaofan Tao, Yang Bai, Bei Yu, Ngai Wong, “AnchorTP: Resilient LLM Inference with State-Preserving Elastic Tensor Parallelism”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C325] Mengjia Dai, Hongduo Liu, Yuhao Ji, Xiaojing Su, Yibo Lin, Bei Yu, “Soft-Constrained Triple Patterning Layout Decomposition”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C324] Jiajun Qin, Cheng Tan, Ruihong Yin, Tianhua Xia, Sai Qian Zhang, Bei Yu, “FLAME: A Framework Exploring Execution Strategies for Multi-Cycle Operations in CGRA”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C323] Rongliang Fu, Wei Xuan, Shuo Yin, Guangyu Hu, Chen Chen, Hongce Zhang, Bei Yu, Tsung-Yi Ho, “eLogic: A E-Graph-based Logic Rewriting Framework for Majority-Inverter Graphs”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C322] Yaohui Han, Beichen Li, Rongliang Fu, Qunsong Ye, Zhiyuan Lu, Junchen Liu, Bei Yu, Tsung-Yi Ho, Tinghuan Chen, “PCB-Migrator: Automated PCB PnR Migration”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C321] Zhenghao Chen, Yuan Pu, Hairuo Han, Yuntao Nie, Jiajun Qin, Yuhan Qin, Tairu Qiu, Zhuolun He, Jianwang Zhai, Bei Yu, Kang Zhao, “MAEDA: An LLM-Powered Multi-Agent Evaluation Framework for EDA Tool Documentation QA”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C320] Wenbo Xu, Silin Chen, Yibo Huang, Xinyun Zhang, Zixiao WANG, Bei Yu, Ningmu Zou, “Node2Node: Node Adaptation with Transformer for Cross-Node Hotspot Detection”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C319] Zhiteng Chao, Yonghao Wang, Xinyu Zhang, Jiaxin Zhou, Tenghui Hua, Husheng Han, Tianmeng Yang, Jianan Mu, Bei Yu, Rui Zhang, Jing Ye, Huawei Li, “Think with Self-Decoupling and Self-Verification: Automated RTL Design with Backtrack-ToT”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C318] Zhaohai Di, Jindong Tu, Zhiyuan HE, Yuan Pu, Jiawei Liu, Chong Tong, Tsung-Yi Ho, Bei Yu, Tinghuan Chen, “Smart-PCLib: A LLM-based Multi-Agent Framework for Automated PCB Component Library Generation”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C317] Xinheng Li, Donger Luo, Peng Xu, Ziyang Yu, Qi Sun, Tinghuan Chen, Bei Yu, Hao Geng, “EDA Flow Matters: Stage-Aware Parameter Optimization of Tool Chain”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C316] Qinggong Shen, Chaoli Zhang, Haoyang Xu, Zhiwen Yu, Bin Guo, Yuxuan Zhao, Bei Yu, Tsung-Yi Ho, Xing Huang, “HPPlacer: A High-Precision Slack-Aware Global Placement Engine”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C315] Bohao Li, Ranran Liu, Yumeng Liu, Cong Jiang, Kang Liu, Bei Yu, Kun Ren, Qi Sun, Cheng Zhuo, “Lithography Hotspot Detection for Complex Non-Manhattan Layouts via Graph Neural Network”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.

• [C314] Shixin Chen, Hengyuan Zhang, Jianwang Zhai, Bei Yu, “CHASE: A CHiplet Architecture Simulation and Exploration Framework with Decoupled Multi-Fidelity Optimization”, ACM International Symposium on Physical Design (ISPD), Bonn, Mar. 15–18, 2026.

• [C313] Peng Xu, Yapeng Li, Tinghuan Chen, Tsung-Yi Ho, Bei Yu, “KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits”, AAAI Conference on Artificial Intelligence (AAAI), Singapore, Feb. 20–27, 2026. (Oral)

• [C312] Hongduo Liu, Yuntao Lu, Mingjun Wang, Xufeng Yao, Bei Yu, “LLM-Assisted Circuit Verification: A Comprehensive Survey”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026. (Invited Paper)

• [C311] Ziyang Yu, Peng Xu, Su Zheng, Siyuan Xu, Hao Geng, Bei Yu, Martin D.F. Wong, “CausalTuner: Will Causality Help High-Dimensional EDA Tool Parameter Tuning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C310] Xinyun Zhang, Zixiao Wang, Yurui Kuang, Bei Yu, “Video-based Visible-Event Cross-modal Person Re-identification for Edge AI Surveillance Systems”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C309] Zhen Zhuang, Zheng Yang, Yuxuan Zhao, Jiawei Hu, Bei Yu, Sung Kyu Lim, Tsung-Yi Ho, “DPO-3D: Differentiable Power Delivery Network Optimization via Flexible Modeling for Routability and IR-Drop Tradeoff in Face-to-Face 3D ICs”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C308] Rongliang Fu, Libo Shen, Ziyi Wang, Zhengxing Lei, Zixiao Wang, Junying Huang, Bei Yu, Tsung-Yi Ho, “DCLOG: Don't Cares-based Logic Optimization using Pre-training Graph Neural Networks”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C307] Shuo Ren, Zhen Zhuang, Rongliang Fu, Leilei Jin, Libo Shen, Bei Yu, Tsung-Yi Ho, “Partitioning-free 3D-IC Floorplanning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C306] Xiaoxiao Liang, Yang Luo, Bei Yu, Yuzhe Ma, “BEAM: Bidirectional MEEF-Driven Mask Optimization for Curvilinear Photonic Design”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

• [C305] Haisheng Zheng, Zhuolun He, Shuo Yin, Yuzhe Ma, Bei Yu, “CombRewriter: Enabling Combinational Logic Simplification in MLIR-Based Hardware Compiler”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19–22, 2026.

2025

• [C304] Haoyuan Wu, Rui Ming, Jilong Gao, Hangyu Zhao, Xueyi Chen, Yikai Yang, Haisheng Zheng, Zhuolun He, Bei Yu, “On-Policy Optimization with Group Equivalent Preference for Multi-Programming Language Understanding”, Neural Information Processing Systems (NeurIPS), San Diego, Dec. 02–07, 2025. (paper) (poster)

• [C303] Lancheng Zou, Shuo Yin, Zehua Pei, Tsung-Yi Ho, Farzan Farnia, Bei Yu, “PermLLM: Learnable Channel Permutation for N:M Sparse Large Language Models”, Neural Information Processing Systems (NeurIPS), San Diego, Dec. 02–07, 2025. (paper) (poster)

• [C302] Senqiao Yang, Junyi Li, Xin Lai, Jinming Wu, Wei Li, Zejun Ma, Bei Yu, Hengshuang Zhao, Jiaya Jia, “VisionThink: Smart and Efficient Vision Language Model via Reinforcement Learning”, Neural Information Processing Systems (NeurIPS), San Diego, Dec. 02–07, 2025. (paper)

• [C301] Sitong Wu, Haoru Tan, Jingyao Li, Shaofeng Zhang, Xiaojuan Qi, Bei Yu, Jiaya Jia, “DLoFT: Gradient-Decoupled Fine-Tuning for Generalizable Long Chain-of-Thought Reasoning”, Neural Information Processing Systems (NeurIPS), San Diego, Dec. 02–07, 2025. (paper)

• [C300] Hongquan He, Zhen Wang, Jingya Wang, Tao Wu, Xuming He, Bei Yu, Jingyi Yu, Hao Geng, “LithoSim: A Large, Holistic Lithography Simulation Benchmark for AI-Driven Semiconductor Manufacturing”, Neural Information Processing Systems (NeurIPS), San Diego, Dec. 02–07, 2025. (paper) (poster)

• [C299] Mingkang Zhu, Xi Chen, Zhongdao Wang, Bei Yu, Hengshuang Zhao, Jiaya Jia, “Enhancing LLM Knowledge Learning through Generalization”, Empirical Methods in Natural Language Processing (EMNLP), Suzhou, Nov. 5–9, 2025. (paper)

• [C298] Zehua Pei, Hui-Ling Zhen, Ying Zhang, Zhiyuan Yang, Xing Li, Xianzhi Yu, Mingxuan Yuan, Bei Yu, “Behavioral Fingerprinting of Large Language Models”, Open Conference of AI Agents for Science, Oct. 22, 2025. (arXiv)

• [C297] Yuxuan Zhao, Feng Gu, Siting Liu, Peiyu Liao, Bei Yu, “H3D: Heterogeneous Resources Aware Global Router for Face-to-Face Bonded 3D ICs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C296] Ziyi Wang, Fangzhou Liu, Tsung-Yi Ho, David Z. Pan, Bei Yu, “NUA-Timer: Pre-Synthesis Timing Prediction Under Non-Uniform Input Arrival Times”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C295] Shuo Yin, Jiahao Xu, Jiaxi Jiang, Mingjun Li, Yuzhe Ma, Tsung-Yi Ho, Bei Yu, “G-Contour: GPU Accelerated Contour Tracing For Large-Scale Layouts”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C294] Yuntao Lu, Mingjun Wang, Yihan Wen, Boyu Han, Jianan Mu, Huawei Li, Bei Yu, “VIRTUAL: Vector-based Dynamic Power Estimation via Decoupled Multi-Modality Learning”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C293] Yuan Pu, Yuhao Ji, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu, “GPU Acceleration for Versatile Buffer Insertion”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C292] Yuan Pu, Zhuolun He, Shutong Lin, Jiajun Qin, Xinyun Zhang, Hairuo Han, Haisheng Zheng, Yuqi Jiang, Cheng Zhuo, Qi Sun, David Z. Pan, Bei Yu, “MM-GRADE: A Multi-Modal EDA Tool Documentation QA Framework Leveraging Retrieval Augmented Generation”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C291] Yuhao Ji, Yuntao Lu, Zuodong Zhang, Zizheng Guo, Yibo Lin, Bei Yu, “DiffCCD: Differentiable Concurrent Clock and Data Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C290] Peiyu Liao, Yuxuan Zhao, Siting Liu, Bei Yu, “Ultrafast Density Gradient Accumulation in 3D Analytical Placement with Divergence Theorem”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (slides)

• [C289] Shanyi Li, Zhen Zhuang, Siyuan Liang, Bei Yu, Tsung-Yi Ho, “MMPack: Multi-Mask Co-Design for Ultra-Large Wafer-Scale Package Integration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper)

• [C288] Leilei Jin, Rongliang Fu, Zhen Zhuang, Liang Xiao, Fangzhou Liu, Bei Yu, Tsung-Yi Ho, “ChronoTE: Crosstalk-Aware Timing Estimation for Routing Optimization via Edge-Enhanced GNNs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper)

• [C287] Jindong Tu, Yapeng Li, Peng Xu, Tuo Li, Guoqing Li, Zushuai Xie, Bei Yu, Tinghuan Chen, “RSizing: Robust Bayesian Optimization for Analog Circuit Sizing Under Process Variations”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper)

• [C286] Zhen Wang, Hongquan He, Tao Wu, Xuming He, Qi Sun, Cheng Zhuo, Bei Yu, Jingyi Yu, Hao Geng, “LMLitho: A Large Vision Model-Driven Lithography Simulation Framework”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper) (Best Paper Award Nomination)

• [C285] Donger Luo, Tianyi Li, Xinheng Li, Qi Sun, Cheng Zhuo, Bei Yu, Jingyi Yu, Hao Geng, “LLM-Augmented Multi-Modal Fusion for SoC Design Space Exploration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025. (paper)

• [C284] Xiaogang Xu, Jiafei Wu, Qingsen Yan, Jiequan Cui, Richang Hong, Bei Yu, “Learnable Feature Patches and Vectors for Boosting Low-light Image Enhancement without External Knowledge”, IEEE International Conference on Computer Vision (ICCV), Honolulu, Oct. 19–23, 2025. (paper)

• [C283] Tianyuan Qu, Longxiang Tang, Bohao PENG, Senqiao Yang, Bei Yu, Jiaya Jia, “Does Your Vision-Language Model Get Lost in the Long Video Sampling Dilemma?”, IEEE International Conference on Computer Vision (ICCV), Honolulu, Oct. 19–23, 2025. (paper)

• [C282] Sitong Wu, Haoru Tan, Yukang Chen, Shaofeng Zhang, Jingyao Li, Bei Yu, Xiaojuan Qi, Jiaya Jia, “Mixture-of-Scores: Robust Image-Text Data Quality Score via Three Lines of Code”, IEEE International Conference on Computer Vision (ICCV), Honolulu, Oct. 19–23, 2025. (paper)

• [C281] Shuo Yin, Su Zheng, Ziyang Yu, Bei Yu, “TorchLitho 2.0: Ultrafast Differentiable Lithography Simulation Engine”, IEEE International Conference on ASIC (ASICON), Kunming, Oct. 21–24, 2025. (paper) (slides) (code) (Invited Paper)

• [C280] Ziyang Yu, Bei Yu, “Large-Scale VLSI Mask Optimization: A Survey”, International Workshop on Advanced Patterning Solutions (IWAPS), Shenzhen, Oct. 14–15, 2025. (paper) (slides) (Keynote Paper)

• [C279] Yuntao Lu, Dehua Liang, Siting Liu, Yuhao Ji, Yu Zhang, Xuanqi Chen, Xia Lin, Jinlei Lu, Weihua Sheng, Bei Yu, “A Hybrid Optimization Framework for Power-Efficient Pulsed Latch Utilization in Clock Networks”, ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), Santa Cruz, Sep. 08–10, 2025. (paper) (slides)

• [C278] Haoyuan Wu, Rui Ming, Haisheng Zheng, Zhuolun He, Bei Yu, “Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts”, Association for Computational Linguistics (ACL), Vienna, July 27–Aug. 1st, 2025. (paper) (slides) (poster)

• [C277] Mingkang Zhu, Xi Chen, Zhongdao Wang, Bei Yu, Hengshuang Zhao, Jiaya Jia, “TGDPO: Harnessing Token-Level Reward Guidance for Enhancing Direct Preference Optimization”, International Conference on Machine Learning (ICML), Vancouver, Jul. 13–19, 2025. (paper) (poster)

• [C276] Mingjun Wang, Yihan Wen, Bin Sun, Jianan Mu, Juan Li, Xiaoyi Wang, Jing Justin Ye, Bei Yu, Huawei Li, “Bridging Layout and RTL: Knowledge Distillation based Timing Prediction”, International Conference on Machine Learning (ICML), Vancouver, Jul. 13–19, 2025. (paper) (slides)

• [C275] Xiaogang Xu, Kun Zhou, Tao Hu, Jiafei Wu, Ruixing Wang, Bei Yu, Hao Peng, “Low-Light Video Enhancement via Spatial-Temporal Consistent Decomposition”, International Joint Conference on Artificial Intelligence (IJCAI), Montreal, Aug. 16–22, 2025. (paper)

• [C274] Shaoteng Liu, Tianyu Wang, Jui-Hsien Wang, Qing Liu, Zhifei Zhang, Joon-Young Lee, Yijun Li, Bei Yu, Zhe Lin, Soo Ye Kim, Jiaya Jia, “Generative Video Propagation”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), Nashville, Jun. 11–15, 2025. (video) (paper)

• [C273] Bin Xia, Yuechen Zhang, Jingyao Li, Chengyao Wang, Yitong Wang, Xinglong Wu, Bei Yu, Jiaya Jia, “DreamOmni: Unified Image Generation and Editing”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), Nashville, Jun. 11–15, 2025. (paper)

• [C272] Senqiao Yang, Yukang Chen, Zhuotao Tian, Chengyao Wang, Jingyao Li, Bei Yu, Jiaya Jia, “VisionZip: Longer is Better but Not Necessary in Vision Language Models”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), Nashville, Jun. 11–15, 2025. (video) (paper)

• [C271] Yuxuan Zhao, Peiyu Liao, Bei Yu, “3D-Flow: Flow-based Standard Cell Legalization for 3D ICs”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides) (poster)

• [C270] Hongduo Liu, Chen BAI, Peng Xu, Lihao Yin, Xianzhi Yu, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “LLMShare: Optimizing LLM Inference Serving with Hardware Architecture Exploration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides) (poster)

• [C269] Ziyang Yu, Peng Xu, Zixiao WANG, Binwu Zhu, Qipan Wang, Yibo Lin, Runsheng Wang, Bei Yu, Martin Wong, “SDM-PEB: Spatial-Depthwise Mamba for Enhanced Post-Exposure Bake Simulation”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides) (poster)

• [C268] Su Zheng, Xiaoxiao Liang, Ziyang Yu, Yuzhe Ma, Bei Yu and Martin Wong, “Curvilinear Optical Proximity Correction via Cardinal Spline”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides) (poster)

• [C267] Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin, “A Systematic Approach for Multi-Objective Double-Side Clock Tree Synthesis”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides)

• [C266] Donger Luo, Qi Sun, Xinheng Li, Cheng Zhuo, Bei Yu, Hao Geng, “From Flatland to Forest: Exploring Pareto-optimal Design through RTL Hierarchy Trees”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides)

• [C265] Yuyang Ye, Xiangfei Hu, Yuchen Liu, Peng Xu, Yu Gong, Tinghuan Chen, Hao Yan, Bei Yu, Longxing Shi, “Rank-based Multi-objective Approximate Logic Synthesis via Monte Carlo Tree Search”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides)

• [C264] Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Gao Jun, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li, “MOSS: Multi-Modal Representation Learning on Sequential Circuits”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides) (poster)

• [C263] Baohui Xie, Xinrui Zhu, Zhiyuan Lu, Yuan Pu, Tongkai Wu, Xiaofeng Zou, Bei Yu, Tinghuan Chen, “DSPlacer: DSP Placement for FPGA-based CNN accelerator”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025. (paper) (slides)

• [C262] Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu, “Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation”, Nations of the Americas Chapter of the Association for Computational Linguistics (NAACL), Albuquerque, New Mexico, Apr. 29–May 4, 2025. (paper) (poster)

• [C261] Haoyuan Wu, Haisheng Zheng, Yuan Pu, Bei Yu, “Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment”, International Conference on Learning Representations (ICLR), Singapore, Apr. 24–28, 2025. (paper) (slides) (poster)

• [C260] Xiangfei Hu, Yuyang Ye, Tinghuan Chen, Hao Yan, Bei Yu, “Timing-driven Approximate Logic Synthesis Based on Double-chase Grey Wolf Optimizer”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Lyon, France, Mar. 31–Apr. 02, 2025. (paper) (slides)

• [C259] Haisheng Zheng, Haoyuan WU, Zhuolun He, Yuzhe Ma, Bei Yu, “iRw: An Intelligent Rewriting”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Lyon, France, Mar. 31–Apr. 02, 2025. (paper) (slides) (poster)

• [C258] Jiawei Liu, Zhiyan Liu, Xun He, Jianwang Zhai, Zhengyuan Shi, Qiang Xu, Bei Yu, Chuan Shi, “WideGate: Beyond Directed Acyclic Graph Learning in Subcircuit Boundary Prediction”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Lyon, France, Mar. 31–Apr. 02, 2025. (paper) (slides)

• [C257] Feng Guo, Jianwang Zhai, Jingyu Jia, Jiawei Liu, Kang Zhao, Bei Yu, Chuan Shi, “IR-Fusion: A Fusion Framework for Static IR Drop Analysis Combining Mathematical Solutions and Machine Learning”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Lyon, France, Mar. 31–Apr. 02, 2025. (paper) (slides)

• [C256] Tianyi Li, Zhexin Tang, Tao Wu, Bei Yu, Jingyi Yu, Hao Geng, “LLM-SRAF: Sub-Resolution Assist Feature Generation Using Large Language Model”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Lyon, France, Mar. 31–Apr. 02, 2025. (paper)

• [C255] Yuxuan Zhao, Lancheng Zou, Bei Yu, “Physical Design for Advanced 3D ICs: Challenges and Solutions”, ACM International Symposium on Physical Design (ISPD), Austin, Mar. 16–19, 2025. (paper) (slides) (Invited Paper)

• [C254] Yuan Pu, Fangzhou Liu, Zhuolun He, Keren Zhu, Rongliang Fu, Ziyi Wang, Tsung-Yi Ho, Bei Yu, “HeLO: A Heterogeneous Logic Optimization Framework by Hierarchical Clustering and Graph Learning”, ACM International Symposium on Physical Design (ISPD), Austin, Mar. 16–19, 2025. (paper) (slides) (Best Paper Award Nomination)

• [C253] Fangzhou Liu, Guannan Guo, Yuyang Ye, Ziyi Wang, Wenjie Fu, Weihua Sheng, Bei Yu, “GraphCAD: Leveraging Graph Neural Networks for Accuracy Prediction Handling Crosstalk-affected Delays”, ACM International Symposium on Physical Design (ISPD), Austin, Mar. 16–19, 2025. (paper) (slides)

• [C252] Zheng Yang, Zhen Zhuang, Bei Yu, Tsung-Yi Ho, Martin D.F. Wong, Sung-Kyu Lim, “ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICs”, ACM International Symposium on Physical Design (ISPD), Austin, Mar. 16–19, 2025. (paper)

• [C251] Guojin Chen, Haoyu Yang, Haoxing Ren, Bei Yu, “Intelligent OPC Engineer Assistant for Semiconductor Manufacturing”, AAAI Conference on Artificial Intelligence (AAAI), Philadelphia, Feb. 25–Mar. 04, 2025. (arXiv) (paper) (poster)

• [C250] Zixiao Wang, Junwu Weng, Mengyuan Liu, Bei Yu, “FlexPose: Pose Distribution Adaptation with Limited Guidance”, AAAI Conference on Artificial Intelligence (AAAI), Philadelphia, Feb. 25–Mar. 04, 2025. (paper) (poster)

• [C249] Zixiao Wang, Jieya Zhou, Su Zheng, Shuo Yin, Kaichao Liang, Shoubo Hu, Xiao Chen, Bei Yu, “TorchResist: Open-source differentiable resist simulator”, SPIE Advanced Lithography + Patterning, San Jose, Feb. 23–27, 2025. (paper) (poster) (code)

• [C248] Shixin Chen, Hengyuan Zhang, Zichao Ling, Jianwang Zhai, Bei Yu, “The Survey of 2.5D Integrated Architecture: An EDA perspective”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Japan, Jan. 20–23, 2025. (paper) (slides) (Invited Paper)

• [C247] Lin Chen, Ran Chen, Shoubo Hu, Xufeng Yao, Zhentao Tang, Shixiong Kai, Siyuan Xu, Mingxuan Yuan, Jianye Hao, Bei Yu, Jiang Xu, “PCBAgent: An Agent-based Framework for High-Density Printed Circuit Board Placement”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Japan, Jan. 20–23, 2025. (paper)

• [C246] Xinfei Liu, Siting Liu, Bei Yu, Song Chen, Qi Xu, “ThePlace: Thermal-Aware Placement With Operator Learning-Based Ultra-Fast Simulator”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Japan, Jan. 20–23, 2025. (paper) (slides)

• [C245] Zirui Li, Kanglin Tian, Jianwang Zhai, Zixuan Li, Shixiong Kai, Siyuan Xu, Bei Yu, Kang Zhao, “FTAFP: A Feedthrough-Aware Floorplanner for Hierarchical Design of Large-Scale SoCs”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Japan, Jan. 20–23, 2025. (paper)

• [J149] Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng, “Adaptive ILT via Multi-level Lithography Simulation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 11, pp. 4341–4354, 2025. (paper)

• [J148] Su Zheng, Wenqian Zhao, Shuyuan Sun, Fan Yang, Bei Yu, Martin D.F. Wong, “Streamlining Computational Lithography with Efficient Pattern Database”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 11, pp. 4263–4275, 2025. (paper)

• [J147] Xufeng Yao, Haoyang Li, Tsz Ho Chan, Wenyi Xiao, Mingxuan Yuan, Yu Huang, Lei Chen, Bei Yu, “HDLdebugger: Streamlining HDL debugging with Large Language Models”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 06, pp. 102:1–102:26, 2025. (paper)

• [J146] Zhuolun He, Yuan Pu, Haoyuan Wu, Tairu Qiu, Bei Yu, “Large Language Models for EDA: Future or Mirage?”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 06, pp. 90:1–90:53, 2025. (paper)

• [J145] Zhe Xiao, Xu He, Haoying Wu, Bei Yu, Yang Guo, “EDA-Copilot: A RAG-Powered Intelligent Assistant for EDA Tools”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 06, pp. 99:1–99:24, 2025. (paper)

• [J144] Jindong Tu, Yapeng Li, Pengjia Li, Peng Xu, Qianru Zhang, Sanping Wan, Yongsheng Sun, Bei Yu, Tinghuan Chen, “SMART: Graph Learning-Boosted Subcircuit Matching for Large-scale Analog Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 10, pp. 4018–4031, 2025. (paper)

• [J143] Weiguo Li, Zhipeng Huang, Bei Yu, Wenxing Zhu, Jian Chen, Zhixue He, Xingquan Li, “iCTS: Iterative and Hierarchical Clock Tree Synthesis with Skew-Latency-Load Tree”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 10, pp. 3948–3961, 2025. (paper)

• [J142] Peng Xu, Jindong Tu, Guojin Chen, Keren Zhu, Tinghuan Chen, Tsung-Yi Ho, Bei Yu, “PARoute2: Enhanced Analog Routing via Performance-Drive Guidance Generation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 10, pp. 3654–3667, 2025. (paper)

• [J141] Yang Bai, Mingjun Li, Wendong Xu, Bei Yu, “A Learned Performance Model with Transfer Learning Across GPUs on Tensorized Instructions”, IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 36, no. 09, pp. 1904–1919, 2025. (paper)

• [J140] Mingjun Cheng, Shihan Zhang, Xin Zheng, Xian Lin, Huaien Gao, Shuting Cai, Xiaoming Xiong, Bei Yu, “Efficient Design Space Exploration for the BOOM Using SAC-Based Reinforcement Learning”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 33, no. 08, pp. 2252–2263, 2025. (paper)

• [J139] Xufeng Yao, Wenqian Zhao, Qi Sun, Cheng Zhuo, Bei Yu, “High-level Synthesis Directives Design Optimization via Large Language Model”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 05, pp. 78:1–78:24, 2025. (paper)

• [J138] Peng Xu, Su Zheng, Mingzi Wang, Ziyang Yu, Shixin Chen, Tinghuan Chen, Keren Zhu, Tsung-Yi Ho, Bei Yu, “Rank-DSE: Neural Pareto Comparator of Microarchitecture Design Space Exploration”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 05, pp. 71:1–71:24, 2025. (paper)

• [J137] Yuan Pu, Tinghuan Chen, Zhuolun He, Jiajun Qin, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu, “IncreMacro: Incremental Macro Placement Refinement”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 08, pp. 3222–3235, 2025. (paper)

• [J136] Rongliang Fu, Chao Wang, Bei Yu, Tsung-Yi Ho, “TeMACLE: A Technology Mapping-Aware Area-Efficient Standard Cell Library Extension Framework”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 08, pp. 3034–3045, 2025. (paper)

• [J135] Wenqian Zhao, Lancheng Zou, Zixiao Wang, Xufeng Yao, Bei Yu “HAPE: Hardware-Aware LLM Pruning For Efficient On-Device Inference Optimization”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 04, pp. 61:1–61:18, 2025. (paper) (Editor's Pick)

• [J134] Binwu Zhu, Su Zheng, Yuzhe Ma, Bei Yu, Martin Wong, “Bridging Hotspot Detection and Mask Optimization via Domain-Crossing Masked Layout Modeling”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 04, pp. 54:1–54:20, 2025. (paper)

• [J133] Jiahao Xu, Zhuolun He, Shuo Yin, Yuan Pu, Wenjian Yu, Bei Yu, “EasyMRC: Efficient Mask Rule Checking via Representative Edge Sampling”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 30, no. 03, pp. 47:1–47:19, 2025. (paper)

• [J132] Lancheng Zou, Su Zheng, Peng Xu, Siting Liu, Bei Yu, Martin D.F. Wong, “Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 07, pp. 2627–2640, 2025. (paper)

• [J131] Xinyun Zhang, Binwu Zhu, Fangzhou Liu, Jiaxi Jiang, Ziyi Wang, Peng Xu, Hong Xu, Bei Yu, “Pre-Routing Timing Prediction Across Different Technology Nodes”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 07, pp. 2697–2710, 2025. (paper)

• [J130] Zhuolun He, Yuan Pu, Haoyuan Wu, Yuhan Qin, Tairu Qiu, Bei Yu, “Large Language Models for EDA: From Assistants to Agents”, Foundations and Trends in Electronic Design Automation, vol. 14, no. 4, pp. 295–314, 2025.

• [J129] Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin D.F. Wong, “Sign-off Timing Considerations via Concurrent Routing Topology Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 05, pp. 1942–1953, 2025. (paper)

• [J128] Hongxi Wu, Xingquan Li, Liang Chen, Bei Yu, Wenxing Zhu, “Delay-Driven Rectilinear Steiner Tree Construction”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 05, pp. 1928–1941, 2025. (paper)

• [J127] Ziyang Yu, Su Zheng, Wenqian Zhao, Shuo Yin, Xiaoxiao Liang, Guojin Chen, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “RuleLearner: OPC Rule Extraction from Inverse Lithography Technique Engine”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 05, pp. 1915–1927, 2025. (paper)

• [J126] Yuyang Ye, Peng Xu, Lizheng Ren, Tinghuan Chen, Hao Yan, Bei Yu, Longxing Shi, “Learning-driven Physically-aware Large-scale Circuit Gate Sizing”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 05, pp. 1901–1914, 2025. (paper)

• [J125] Wenqian Zhao, Shuo Yin, Chen Bai, Zixiao Wang, Bei Yu, “BAQE: Backend-Adaptive DNN Deployment via Synchronous Bayesian Quantization and Hardware Configuration Exploration”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 04, pp. 1394–1405, 2025. (paper)

• [J124] Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “Layout Decomposition via Boolean Satisfiability”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 03, pp. 1112–1125, 2025. (paper)

• [J123] Rongliang Fu, Mengmeng Wang, Yirong Kan, Olivia Chen, Nobuyuki Yoshikawa, Bei Yu, Tsung-Yi Ho, “Buffer and Splitter Insertion for Adiabatic Quantum-Flux-Parametron Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 03, pp. 1180-1192, 2025. (paper)

• [J122] Ziyi Wang, Wenqian Zhao, Yuan Pu, Lei Chen, Wilson Wang Kit Thong, Weihua Sheng, Tsung-Yi Ho, Bei Yu, “ParSGCN: Bridging the Gap Between Emulation Partitioning and Scheduling”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 03, pp. 1180-1192, 2025. (paper)

• [J121] Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie, “Klotski v2: Improved DNN Model Orchestration Framework for Dataflow Architecture Accelerators”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 03, pp. 1045–1058, 2025. (paper)

• [J120] Yuxuan Zhao, Peiyu Liao, Siting Liu, Jiaxi Jiang, Yibo Lin, Bei Yu, “Analytical Heterogeneous Die-to-Die 3D Placement with Macros”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 02, pp. 402–415, 2025. (paper)

• [J119] Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Yu Huang, Bei Yu, “FGNN2: A Powerful Pre-training Framework for Learning the Logic Functionality of Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 01, pp. 227–240, 2025. (code) (paper)

2024

• [C244] Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu, “Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks”, Empirical Methods in Natural Language Processing (EMNLP), Miami, Florida, Dec. 12–16, 2024. (paper) (poster) (slides)

• [C243] Su Zheng, Zhengqi Gao, Fan-Keng Sun, Duane S. Boning, Bei Yu, Martin D. Wong, “Improving Neural ODE Training with Temporal Adaptive Batch Normalization”, Neural Information Processing Systems (NeurIPS), Vancouver, Dec. 09–15, 2024. (paper) (slides)

• [C242] Jiequan Cui, Zhuotao Tian, Zhisheng Zhong, Xiaojuan Qi, Bei Yu, Hanwang Zhang, “Decoupled Kullback-Leibler Divergence Loss”, Neural Information Processing Systems (NeurIPS), Vancouver, Dec. 09–15, 2024. (paper)

• [C241] Guojin Chen, Keren Zhu, Seunggeun Kim, Hanqing Zhu, Yao Lai, Bei Yu, David Z. Pan, “LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation”, arXiv preprint:2406.05250. (paper) (code)

• [C240] Guojin Chen, Haoyu Yang, Haoxing Ren, Bei Yu and David Z. Pan, “Differentiable Edge-based OPC”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C239] Xufeng Yao, Yiwen Wang, Xing Li, Yingzhao Lian, Ran Chen, Lei Chen, Mingxuan Yuan, Hong Xu, Bei Yu, “RTLRewriter: Methodologies for Large Models aided RTL Code Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C238] Peng Xu, Su Zheng, Yuyang Ye, Chen Bai, Siyuan Xu, Hao Geng, Tsung-Yi Ho, Bei Yu, “RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C237] Yu Zhang, Hui-Ling Zhen, Mingxuan Yuan, Bei Yu, “DiffSAT: Differential MaxSAT Layer for SAT Solving”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C236] Yuan Pu, Zhuolun He, Tairu Qiu, Haoyuan Wu, Bei Yu, “Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides) (Best Paper Award Nomination)

• [C235] Yihan Wen, Juan Li, Bei Yu, Xiaoyi Wang, “Peak Power and Dynamic IR-drop Assessment via Waveform Augmenting”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C234] Lvcheng Chen, Ying Wu, Chenyi Wen, Shizhang Wang, Li Zhang, Bei Yu, Qi Sun, Cheng Zhuo, “An Agile Framework for Efficient LLM Accelerator Development and Model Inference”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides) (William J. McCalla Best Paper Award)

• [C233] Jiawei Liu, Jianwang Zhai, Mingyu Zhao, Zhe Lin, Bei Yu, Chuan Shi, “PolarGate: Breaking the Functionality Representation Bottleneck of And-Inverter Graph Neural Network”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C232] Shangran Lin, Xinrui Zhu, Baohui Xie, Tinghuan Chen, Cheng Zhuo, Qi Sun, Bei Yu, “RISCSparse: Point Cloud Inference Engine on RISC-V Processor”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C231] Yuanhang Gao, Donger Luo, Chen Bai, Bei Yu, Hao Geng, Qi Sun, Cheng Zhuo, “Is Vanilla Bayesian Optimization Enough for High-Dimensional Architecture Design Optimization?”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C230] Zehua Pei, Huiling Zhen, Mingxuan Yuan, Yu Huang, Bei Yu, “BetterV: Controlled Verilog Generation with Discriminative Guidance”, International Conference on Machine Learning (ICML), Vienna, Jul. 21–27, 2024. (arXiv) (paper) (slides) (poster)

• [C229] Lancheng Zou, Wenqian Zhao, Shuo Yin, Chen Bai, Qi Sun, Bei Yu, “BiE: Bi-Exponent Block Floating-Point for Large Language Models Quantization”, International Conference on Machine Learning (ICML), Vienna, Jul. 21–27, 2024. (paper) (slides) (poster)

• [C228] Hongduo Liu, Peng Xu, Yuan Pu, Lihao Yin, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “NeuroSelect: Learning to Select Clauses in SAT Solvers”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C227] Guojin Chen, Hongquan He, Peng Xu, Hao Geng, Bei Yu, “Efficient Bilevel Source Mask Optimization”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C226] Xinyun Zhang, Su Zheng, Guojin Chen, Binwu Zhu, Hong Xu, Bei Yu, “Fracturing-aware Curvilinear ILT via Circular E-beam Mask Writer”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C225] Xinyun Zhang, Binwu Zhu, Fangzhou Liu, Ziyi Wang, Peng Xu, Hong Xu, Bei Yu, “Disentangle, Align and Generalize: Learning A Timing Predictor from Different Technology Nodes”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C224] Zixiao Wang, Yunheng Shen, Xufeng Yao, Wenqian Zhao, Yang Bai, Farzan Farnia, Bei Yu, “ChatPattern: Layout Pattern Customization via Natural Language”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C223] Peng Xu, Guojin Chen, Keren Zhu, Tinghuan Chen, Tsung-Yi Ho, Bei Yu, “Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential Relaxation”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C222] Su Zheng, Yuzhe Ma, Bei Yu, Martin Wong, “EMOGen: Enhancing Mask Optimization via Pattern Generation”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C221] Mingjun Li, Pengjia Li, Shuo Yin, Shixin Chen, Beichen Li, Chong Tong, Jianlei Yang, Tinghuan Chen, Bei Yu, “WinoGen: A Highly Configurable Winograd Convolution IP Generator for Efficient CNN Acceleration on FPGA”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides) (poster)

• [C220] Yuan Pu, Fangzhou Liu, Yu Zhang, Zhuolun He, Kai-Yuan Chao, Yibo Lin, Bei Yu, “Lesyn: Placement-aware Logic Resynthesis for Non-Integer Multiple-Cell-Height Designs”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides)

• [C219] Jiaxi Jiang, Lancheng Zou, Wenqian Zhao, Zhuolun He, Tinghuan Chen, Bei Yu, “PDRC: Package Design Rule Checking via GPU-Accelerated Geometric Intersection Algorithms for Non-Manhattan Geometry”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides)

• [C218] Xiaoxiao Liang, Haoyu Yang, Kang Liu, Bei Yu, Yuzhe Ma, “CAMO: Correlation-Aware Mask Optimization with Modulated Reinforcement Learning”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides)

• [C217] Donger Luo, Qi Sun, Xinheng Li, Chen Bai, Bei Yu, Hao Geng, “Knowing The Spec to Explore The Design via Transformed Bayesian Optimization”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides)

• [C216] Wan Luan Lee, Dian-Lun Lin, Tsung-Wei Huang, Shui Jiang, Tsung-Yi Ho, Yibo Lin, Bei Yu, “G-kway: Multilevel GPU-Accelerated k-way Graph Partitioner”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C215] Yinuo Bai, Enxin Yi, Wei Xing, Bei Yu, Zhou Jin, “Unleashing the Potential of AQFP Logic Placement via Entanglement Entropy and Projection”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C214] Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu, “GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C213] Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng, “Efficient ILT via Multigrid-Schwartz Method”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C212] Weiguo Li, Zhipeng Huang, Bei Yu, Wenxing Zhu, Xingquan Li, “Toward Controllable Hierarchical Clock Tree Synthesis with Skew-Latency-Load Tree”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C211] Jiequan Cui, Beier Zhu, Xin Wen, Xiaojuan Qi, Bei Yu, Hanwang Zhang, “Classes Are Not Equal: An Empirical Study on Image Recognition Fairness”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), Seattle, Jun. 17–21, 2024. (paper) (video)

• [C210] Shan Shen, Dingcheng Yang, Yuyang Xie, Chunyan Pei, Bei Yu, Wenjian Yu, “Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on SRAM Designs”, ACM Great Lakes Symposium on VLSI (GLSVLSI), Tampa Bay Area, FL, June 12–14, 2024. (paper)

• [C209] Su Zheng, Gang Xiao, Ge Yan, Meng Dong, Hong Chen, Yuzhe Ma, Bei Yu, Martin Wong, “Model-based OPC Extension in OpenILT”, International Symposium of EDA (ISEDA), May 10–13, 2024. (paper) (slides)

• [C208] Fangzhou Liu, Zehua Pei, Ziyang Yu, Haisheng Zheng, Zhuolun He, Tinghuan Chen, Bei Yu, “CBTune: Contextual Bandit Tuning for Logic Synthesis”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024. (paper) (slides) (poster)

• [C207] Hongduo Liu, Peiyu Liao, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “Parallel Grobner Basis Rewriting and Memory Optimization for Efficient Multiplier Verification”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024. (paper) (slides) (poster)

• [C206] Zhuolun He, Bei Yu, “Large Language Models for EDA: Future or Mirage?”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (Invited Paper) (paper)

• [C205] Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu, “IncreMacro: Incremental Macro Placement Refinement”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (paper) (slides) (Best Paper Award Nomination)

• [C204] Yu Zhang, Yuan Pu, Fangzhou Liu, Peiyu Liao, Kai-Yuan Chao, Keren Zhu, Yibo Lin, Bei Yu, “Multi-Electrostatics Based Placement for Non-Integer Multiple-Height Cells”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (paper) (slides)

• [C203] Shuo Yin, Wenqian Zhao, Li Xie, Hong Chen, Yuzhe Ma, Tsung-Yi Ho, Bei Yu, “FuILT: Full Chip ILT System With Boundary Healing”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (paper) (slides) (evaluation)

• [C202] Siting Liu, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu, Martin Wong, “Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (paper) (slides)

• [C201] Guojin Chen, Hao Geng, Bei Yu, David Z. Pan, “Open-Source Differentiable Lithography Imaging Framework”, SPIE Advanced Lithography + Patterning, San Jose, Feb. 25–29, 2024. (paper) (slides) (code)

• [C200] Chen Bai, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning”, AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024. (paper) (slides) (poster)

• [C199] Xufeng Yao, Fanbin Lu, Yuechen Zhang, Xinyun Zhang, Wenqian Zhao, Bei Yu, “Progressively Knowledge Distillation via Re-parameterizing Diffusion Reverse Process”, AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024. (paper) (slides) (poster)

• [C198] Haoyuan Wu, Xinyun Zhang, Peng Xu, Peiyu Liao, Xufeng Yao, Bei Yu, “p-Laplacian Adaptation for Generative Pre-trained Vision-Language Models”, AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024. (paper) (slides) (poster) (Oral)

• [C197] Yu Zhang, Wei Lin, Sisi Chen, Qingyu Song, Jiaxun Lu, Yunfeng Shao, Bei Yu, Hong Xu, “Fed2Com: Towards Efficient Compression in Federated Learning”, IEEE International Conference on Computing, Networking and Communications (ICNC), Hawaii, Feb. 19–22, 2024.

• [C196] Xingquan Li, Zengrong Huang, Simin Tao, Zhipeng Huang, Chunan Zhuang, Hao Wang, Yifan Li, Yihang Qiu, Guojie Luo, Huawei Li, Haihua Shen, Mingyu Chen, Dongbo Bu, Wenxing Zhu, Ye Cai, Xiaoming Xiong, Ying Jiang, Yi Heng, Peng Zhang, Bei Yu, Biwei Xie, Yungang Bao, “iEDA: An Open-source infrastructure of EDA”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper) (slides) (Invited Paper)

• [C195] Xingquan Li, Simin Tao, Shijian Chen, Zhisheng Zeng, Zhipeng Huang, Hongxi Wu, Weiguo Li1, Zengrong Huang, Liwei Ni, Xueyan Zhao, He Liu, Shuaiying Long, Ruizhi Liu, Xiaoze Lin, Bo Yang, Fuxing Huang, Zonglin Yang, Yihang Qiu, Zheqing Shao, Jikang Liu, Yuyao Liang, Biwei Xie, Yungang Bao, Bei Yu, “iPD: An Open-source intelligent Physical Design Tool Chain”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper) (slides) (Invited Paper)

• [C194] Peng Xu, Jintao Li, Tsung-Yi Ho, Bei Yu, Keren Zhu, “Performance-Driven Analog Layout Automation: Current Status and Future Directions”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper) (slides) (Invited Paper)

• [C193] Shixin Chen, Su Zheng, Chen Bai, Wenqian Zhao, Shuo Yin, Yang Bai, Bei Yu, “SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper) (slides)

• [C192] Haisheng Zheng, Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu, “LSTP: A Logic Synthesis Timing Predictor”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper) (slides)

• [C191] Ping Zhang, Pengju Yao, Xingquan Li, Bei Yu, Wenxing Zhu, “V-GR: 3D Global Routing with Via Minimization and Multi-Strategy Rip-up and Rerouting”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024. (paper)

• [J118] Zehua Pei, Xufeng Yao, Wenqian Zhao, Bei Yu, “Quantization via Distillation and Contrastive Learning”, IEEE Transactions on Neural Networks and Learning Systems (TNNLS), vol. 35, no. 12, pp. 17164–17176, 2024. (paper)

• [J117] Jiequan Cui, Zhisheng Zhong, Zhuotao Tian, Shu Liu, Bei Yu, Jiaya Jia, “Generalized Parametric Contrastive Learning”, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 46, no. 12, pp. 7463–7474, 2024. (paper)

• [J116] Lei Chen et al., “Large circuit models: opportunities and challenges”, Science China Information Sciences (SCIS), vol. 67, no. 10, 200402, 2024. (paper)

• [J115] Haoyuan Wu, Zhuolun He, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, Bei Yu, “ChatEDA: A Large Language Model Powered Autonomous Agent for EDA”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 10, pp. 3184–3197, 2024. (paper)

• [J114] Peng Xu, Siyuan Xu, Tinghuan Chen, Guojin Chen, Tsung-Yi Ho, Bei Yu, “DeepOTF: Learning Equations-constrained Prediction for Electromagnetic Behavior”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 05, pp. 80:1–80:22, 2024. (paper)

• [J113] Wenqian Zhao, Xufeng Yao, Shuo Yin, Yang Bai, Ziyang Yu, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “AdaOPC 2.0: Enhanced Adaptive Mask Optimization Framework for Via Layers”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 09, pp. 2674–2686, 2024. (paper)

• [J112] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi, “Timing-driven Technology Mapping Approximation Based on Reinforcement Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 09, pp. 2755–2768, 2024. (paper)

• [J111] Tinghuan Chen, Hao Geng, Qi Sun, Sanping Wan, Yongsheng Sun, Huatao Yu, Bei Yu, “Wages: The Worst Transistor Aging Analysis for Large-scale Analog Integrated Circuits via Domain Generalization”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 05, pp. 73:1–73:23, 2024. (paper)

• [J110] Hongduo Liu, Yijian Qian, Youqiang Liang, Bin Zhang, Zhaohan Liu, Tao He, Wenqian Zhao, Jiangbo Lu, Bei Yu, “A High-Performance Accelerator for Real-Time Super-Resolution on Edge FPGAs”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 03, pp. 53:1–53:25, 2024. (paper)

• [J109] Guojin Chen, Zixiao Wang, Bei Yu, David Z. Pan, Martin D.F. Wong, “Ultra-Fast Source Mask Optimization via Conditional Discrete Diffusion”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 07, pp. 2140–2150, 2024. (paper)

• [J108] Jianwang Zhai, Zichao Ling, Chen Bai, Kang Zhao, Bei Yu, “Machine Learning for Microarchitecture Power Modeling and Design Space Exploration: A Survey”, Journal of Computer Research and Development (J-CRAD), vol. 61, no. 06, pp. 1-19, 2024. (in Chinese)

• [J107] Shixin Chen, Shanyi Li, Zhen Zhuang, Su Zheng, Zheng Liang, Tsung-Yi Ho, Bei Yu, Alberto L. Sangiovanni-Vincentelli, “Floorplet: Performance-aware Floorplan Framework for Chiplet Integration”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 06, pp. 1638–1649, 2024. (paper)

• [J106] Peiyu Liao, Yuxuan Zhao, Dawei Guo, Yibo Lin, Bei Yu, “Analytical Die-to-Die 3D Placement with Bistratal Wirelength Model and GPU Acceleration”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 06, pp. 1624–1637, 2024. (paper)

• [J105] Bo Yang, Qi Xu, Hao Geng, Song Chen, Bei Yu, Yi Kang, “Floorplanning with Edge-Aware Graph Attention Network and Hindsight Experience Replay”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 03, pp. 56:1–56:17, 2024. (paper)

• [J104] Yuzhe Ma, Xufeng Yao, Ran Chen, Ruiyu Li, Xiaoyong Shen, Bei Yu, “Small is Beautiful: Compressing Deep Neural Networks for Partial Domain Adaptation”, IEEE Transactions on Neural Networks and Learning Systems (TNNLS), vol. 35, no. 03, pp. 3575–3585, 2024. (paper)

• [J103] Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin Wong, “L2O-ILT: Learning to Optimize Inverse Lithography Techniques”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 03, pp. 944–955, 2024. (paper)

• [J102] Xiaoliu Luo, Zhuotao Tian, Taiping Zhang, Bei Yu, Yuan Yan Tang, Jiaya Jia, “PFENet: Boosting Few-shot Semantic Segmentation with the Noise-filtered Context-aware Prior Mask”, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 46, no. 02, pp. 1273–1289, 2024. (paper)

• [J101] Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng, “pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis with Perimeter Adjustment”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 02, pp. 667–680, 2024. (paper)

• [J100] Yang Bai, Xufeng Yao, Qi Sun, Wenqian Zhao, Shixin Chen, Zixiao Wang, Bei Yu, “GTCO: Graph and Tensor Co-Design for Transformer-based Image Recognition on Tensor Cores”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 02, pp. 586–599, 2024. (paper)

• [J99] Yuyang Ye, Tinghuan Chen, Zicheng Wang, Hao Yan, Bei Yu, Longxing Shi, “Fast and Accurate Aging-aware Cell Timing Model via Graph Learning”, IEEE Transactions on Circuits and Systems II (TCASII), vol. 71, no. 01, pp. 156–160, 2024. (paper)

• [J98] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 01, pp. 1–23, 2024. (paper)

• [J97] Xiaoxiao Liang, Yikang Ouyang, Haoyu Yang, Bei Yu, Yuzhe Ma, “RL-OPC: Mask Optimization with Deep Reinforcement Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 01, pp. 340–351, 2024. (paper)

2023

• [C190] Su Zheng, Haoyu Yang, Binwu Zhu, Bei Yu, Martin D.F. Wong, “LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing”, Neural Information Processing Systems (NeurIPS), New Orleans, Dec. 10–16, 2023. (paper) (slides) (poster)

• [C189] Yang Bai, Wenqian Zhao, Shuo Yin, Zixiao Wang, Bei Yu, “ATFormer: A Learned Performance Model with Transfer Learning Across Devices for Large-Scale Transformers”, Empirical Methods in Natural Language Processing (EMNLP), Singapore, Dec. 06–10, 2023. (paper) (slides) (poster)

• [C188] Zhuolun He, Bei Yu, “Heterogenous Acceleration for Design Rule Checking”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (Invited Paper)

• [C187] Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie, “Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (poster) (video)

• [C186] Ziyang Yu, Chen BAI, Shoubo Hu, Ran Chen, Taohai He, Mingxuan Yuan, Bei Yu, Martin Wong, “IT-DSE: Invariant Risk Minimized Transfer Microarchitecture Design Space Exploration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (poster) (video)

• [C185] Su Zheng, Lancheng Zou, Peng XU, Siting Liu, Bei Yu, Martin Wong, “Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (poster) (video)

• [C184] Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng, Keren Zhu, Bei Yu, “AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (poster)

• [C183] Rongliang Fu, Olivia Chen, Junying Huang, Bei Yu, Nobuyuki Yoshikawa, Tsung-Yi Ho, “DLPlace: A Delay-Line Clocking-based Placement Framework for AQFP Circuits”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper)

• [C182] Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho and Martin Wong, “Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper)

• [C181] Fuxing Huang, Duanxiang Liu, Xingquan Li, Bei Yu, Wenxing Zhu, “Handling Orientation and Aspect Ratio of Modules in Electrostatics-based Large Scale Fixed-Outline Floorplanning”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper)

• [C180] Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie, “ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis”, IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Oct. 28–Nov. 01, 2023. (paper) (slides)

• [C179] Su Zheng, Bei Yu, Martin Wong, “OpenILT: An Open Source Inverse Lithography Technique Framework”, IEEE International Conference on ASIC (ASICON), Nanjing, Oct. 24–27, 2023. (paper) (slides) (Invited Paper)

• [C178] Wanli Chen, Xufeng Yao, Xinyun Zhang, Bei Yu, “Efficient Deep Space Filling Curve”, IEEE International Conference on Computer Vision (ICCV), Paris, Oct. 02–06, 2023. (paper) (poster) (code)

• [C177] Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng and Bei Yu, “ChatEDA: A Large Language Model Powered Autonomous Agent for EDA”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Utah, Sep. 11-13, 2023. (paper) (arXiv)

• [C176] Bei Yu, “Machine Learning in EDA: When and How”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Utah, Sep. 11-13, 2023. (paper) (Plenary Talk)

• [C175] Siting Liu, Yuan Pu, Peiyu Liao, Hongzhong Wu, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu, “FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler (Extended Abstract)”, International Joint Conference on Artificial Intelligence (IJCAI), Macau, Aug. 19–25, 2023. (paper) (slides)

• [C174] Shui Jiang, Tsung-Wei Huang, Bei Yu, Tsung-Yi Ho, “SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU”, International Conference on Parallel Processing (ICPP), Utah, Aug. 07–10, 2023. (paper)

• [C173] Peng Xu, Lin Zhang, Xuanzhou Liu, Jiaqi Sun, Yue Zhao, Haiqin Yang, Bei Yu, “Do Not Train It: A Linear Neural Architecture Search of Graph Neural Networks”, International Conference on Machine Learning (ICML), Hawaii, Jul. 23–29, 2023. (paper) (slides) (poster)

• [C172] Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu, “OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides)

• [C171] Peiyu Liao, Hongduo Liu, Yibo Lin, Bei Yu, Martin Wong, “On a Moreau Envelope Wirelength Model for Analytical Global Placement”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C170] Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin Wong, “Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C169] Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “Layout Decomposition via Boolean Satisfiability”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C168] Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin Wong, “Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C167] Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, Bei Yu, “Restructure-Tolerant Timing Prediction via Multimodal Fusion”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C166] Zixiao Wang, Yunheng Shen, Wenqian Zhao, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu, “DiffPattern: Layout Pattern Generation via Discrete Diffusion”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C165] Su Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu, Martin Wong, “Mitigating Distribution Shift for Congestion Optimization in Global Placement”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C164] Yu Zhang, Yifan Chen, Zhonglin Xie, Hong Xu, Zaiwen Wen, Yibo Lin, Bei Yu, “LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout Decomposition”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper) (slides) (poster)

• [C163] Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng, “Efficient ILT via Multi-level Lithography Simulation”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023. (paper)

• [C162] Guyue Huang, Yang Bai, Liu Liu, Yuke Wang, Bei Yu, Yufei Ding, Yuan Xie, “ALCOP: Automatic Load-Compute Pipelining in Deep Learning Compiler for AI-GPUs”, Conference on Machine Learning and Systems (MLSys), Jun. 04–08, 2023. (paper) (slides)

• [C161] Zehua Pei, Wenqian Zhao, Zhuolun He, Bei Yu, “Bit-Level Quantization for Efficient Layout Hotspot Detection”, International Symposium of EDA (ISEDA), May 9–11, 2023. (paper)

• [C160] Shuyuan Sun, Xuelian Chen, Fan Yang, Bei Yu, Li Shang, Xuan Zeng, “Efficient Model-based OPC via Graph Neural Network”, International Symposium of EDA (ISEDA), May 9–11, 2023. (paper)

• [C159] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi, “Fast and Accurate Wire Timing Estimation Based on Graph Learning”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023. (paper) (slides)

• [C158] Wei Zhong, Zhenhua Feng, Zhuolun He, Weimin Wang, Yuzhe Ma, Bei Yu, “Enabling Efficient Design Rule Checking with GPU Acceleration”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023. (paper) (slides)

• [C157] Rongliang Fu, Junying Huang, Mengmeng Wang, Yoshikawa Nobuyuki, Bei Yu, Tsung-Yi Ho, Olivia Chen, “BOMIG: A Majority Logic Synthesis Framework for AQFP Logic”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023. (paper)

• [C156] Guojin Chen, Haoyu Yang, Bei Yu, “GPU Accelerated Matrix Cover Algorithm for Multiple Patterning Layout Decomposition”, SPIE Intl. Symp. Advanced Lithography Conference, San Jose, Feb. 26–Mar. 02, 2023. (paper)

• [C155] Yuxuan Zhao, Qi Sun, Zhuolun He, Yang Bai, Bei Yu, “AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution”, AAAI Conference on Artificial Intelligence (AAAI), Feb. 7–14, 2023. (paper) (slides) (poster) (video) (Oral)

• [C154] Hao Geng, Qi Sun, Qi Xu, Tsung-Yi Ho, Bei Yu, “Mixed-type Wafer Failure Pattern Classification”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo Odaiba Miraikan, Jan. 16–19, 2023. (paper) (slides) (Invited Paper)

• [C153] Jianwang Zhai, Yici Cai, Bei Yu, “Microarchitecture Power Modeling via Artificial Neural Network and Transfer Learning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo Odaiba Miraikan, Jan. 16–19, 2023. (paper) (slides) (Best Paper Award Nomination)

• [C152] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi, “Graph-Learning-Driven Path-Based Timing Analysis Results Predictor from Graph-Based Timing Analysis”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo Odaiba Miraikan, Jan. 16–19, 2023. (paper) (slides)

• [J96] Guojin Chen, Ziyang Yu, Hongduo Liu, Yuzhe Ma, Bei Yu, “DevelSet: Deep Neural Level Set for Instant Mask Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 12, pp. 5020–5033, 2023. (paper)

• [J95] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi, “Aging-aware Critical Path Selection via Graph Attention Networks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 12, pp. 5006–5019, 2023. (paper)

• [J94] Tinghuan Chen, Silu Xiong, Huan He, Bei Yu, “TRouter: Thermal-driven PCB Routing via Non-Local Crisscross Attention Networks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3388–3401, 2023. (paper)

• [J93] Wenqian Zhao, Yang Bai, Qi Sun, Wenbo Li, Haisheng Zheng, Nianjuan Jiang, Jiangbo Lu, Bei Yu, Martin D.F. Wong, “A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3210–3223, 2023. (paper)

• [J92] Peiyu Liao, Dawei Guo, Zizheng Guo, Siting Liu, Yibo Lin, Bei Yu, “DREAMPlace 4.0: Timing-driven Placement with Momentum-based Net Weighting and Lagrangian-based Refinement”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3374–3387, 2023. (paper)

• [J91] Ziyang Yu, Peiyu Liao, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “CTM-SRAF: Continuous Transmission Mask-based Constraint-aware Sub Resolution Assist Feature Generation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3402–3411, 2023. (paper)

• [J90] Su Zheng, Hao Geng, Chen Bai, Bei Yu, Martin Wong, “Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 28, no. 05, pp. 1–23, 2023. (paper) (code)

• [J89] Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin Wong, “DRC-SG 2.0: Efficient Design Rule Checking Script Generation via Key Information Extraction”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 28, no. 05, pp. 1–18, 2023. (paper)

• [J88] Xiaogang Xu, Yi Wang, Liwei Wang, Bei Yu, Jiaya Jia, “Conditional Temporal Variational AutoEncoder for Action Video Prediction”, International Journal of Computer Vision (IJCV), vol. 131, no. 10, pp. 2699–2722, 2023. (paper)

• [J87] Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, Bei Yu, “Efficient Arithmetic Block Identification with Graph Learning and Network-flow”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 08, pp. 2591–2603, 2023. (paper)

• [J86] Siting Liu, Yuan Pu, Peiyu Liao, Hongzhong Wu, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu, “FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 07, pp. 2317–2330, 2023. (paper)

• [J85] Yilun Chen, Shijia Huang, Shu Liu, Bei Yu, Jiaya Jia, “DSGN++: Exploiting Visual-Spatial Relation for Stereo-based 3D Detectors”, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 45, no. 4, pp. 4416–4429, 2023. (paper)

• [J84] Zhuotao Tian, Pengguang Chen, Xin Lai, Li Jiang, Shu Liu, Hengshuang Zhao, Bei Yu, Ming-Chang Yang, Jiaya Jia, “Adaptive Perspective Distillation for Semantic Segmentation”, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 45, no. 2, pp. 1372–1387, 2023. (paper)

• [J83] Ran Chen, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Bei Yu, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao, “A Unified Framework for Layout Pattern Analysis with Deep Causal Estimation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 04, pp. 1199–1211, 2023. (paper)

• [J82] Tinghuan Chen, Grace Li Zhang, Bei Yu, Bing Li, Ulf Schlichtmann, “Machine Learning in Advanced IC Design: A Methodological Survey”, IEEE Design & Test, vol. 40, no. 01, pp. 17–33, 2023. (paper) (Invited Paper)

• [J81] Ulf Schlichtmann, Bing Li, Bei Yu, Raviv Gal, “Guest Editors’ Introduction: Special Issue on Machine Learning for CAD/EDA”, IEEE Design & Test, vol. 40, no. 01, pp. 5–7, 2023.

• [J80] Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, “A GPU-enabled Level Set Method for Mask Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 02, pp. 594–605, 2023. (paper)

• [J79] Qi Xu, Junpeng Wang, Qi Sun, Bo Yuan, Song Chen, Bei Yu, Yi Kang, Feng Wu, “Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems”, IEEE Transactions on Automation Science and Engineering (TASE), vol. 20, no. 01, pp. 74–87, 2023. (paper)

• [J78] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 243–256, 2023. (paper) (code)

• [J77] Hao Geng, Tinghuan Chen, Yuzhe Ma, Binwu Zhu, Bei Yu, “PTPT: Physical Design Tool Parameter Tuning via Multi-Objective Bayesian Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 178–189, 2023. (paper)

2022

• [C151] Wei Li, Ruxuan Li, Yuzhe Ma, Siu On Chan, David Pan, Bei Yu, “Rethinking Graph Neural Networks for the Graph Coloring Problem”, arXiv preprint:2208.06975. (paper)

• [C150] Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin Wong, “Efficient Design Rule Checking Script Generation via Key Information Extraction”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Snowbird, Utah, Sep. 12–13, 2022. (paper) (slides) (video) (Best Paper Award Nomination)

• [C149] Zhuolun He, Yuzhe Ma, Bei Yu, “X-Check: GPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022. (paper) (slides) (video)

• [C148] Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, Martin Wong, “AdaOPC: A Self-Adaptive Mask Optimization Framework For Real Design Patterns”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022. (paper) (slides) (video)

• [C147] Zhen Zhuang, Bei Yu, Kai-Yuan Chao, Tsung-Yi Ho, “Multi-Package Co-Design for Chiplet Integration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022. (paper)

• [C146] Liangjian Wen, Yi Zhu, Lei Ye, Guojin Chen, Bei Yu, Jianzhuang Liu, Chunjing Xu, “LayouTransformer: Generating Layout Patterns with Transformer via Sequential Pattern Modeling”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022. (paper) (video)

• [C145] Wanli Chen, Xinge Zhu, Guojin Chen, Bei Yu, “Efficient Point Cloud Analysis Using Hilbert Curve”, European Conference on Computer Vision (ECCV), Tel-Aviv, Oct. 23–27, 2022. (paper) (slides) (video)

• [C144] Xufeng Yao, Yang Bai, Xinyun Zhang, Yuechen Zhang, Qi Sun, Ran Chen, Ruiyu Li, Bei Yu, “PCL: Proxy-based Contrastive Learning for Domain Generalization”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), New Orleans, Jun. 19–24, 2022. (paper) (poster) (slides) (video) (code)

• [C143] Qi Sun, Xinyun Zhang, Hao Geng, Yuxuan Zhao, Yang Bai, Haisheng Zheng, Bei Yu, “GTuner: Tuning DNN Computations on GPU via Graph Attention Network”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022. (paper) (slides) (video)

• [C142] Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang, “Functionality Matters in Netlist Representation Learning”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022. (paper) (slides) (video)

• [C141] Hao Geng, Qi Xu, Tsung-Yi Ho, Bei Yu, “PPATuner: Pareto-driven Tool Parameter Auto-tuning in Physical Design via Gaussian Process Transfer Learning”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022. (paper) (slides) (video)

• [C140] Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao, “Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022. (paper) (slides) (video)

• [C139] Xinyun Zhang, Binwu Zhu, Xufeng Yao, Qi Sun, Ruiyu Li, Bei Yu, “Context-based Contrastive Learning for Scene Text Recognition”, AAAI Conference on Artificial Intelligence (AAAI), Feb. 22–Mar. 1, 2022. (paper) (poster) (video)

• [C138] Siting Liu, Peiyu Liao, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu, “FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022. (paper) (slides) (video) (Best Paper Award)

• [C137] Peiyu Liao, Siting Liu, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu, “DREAMPlace 4.0: Timing-driven Global Placement with Momentum-based Net Weighting”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022. (paper) (slides) (video)

• [C136] Haoyu Yang, Kit Fung, Yuxuan Zhao, Yibo Lin, Bei Yu, “Mixed-Cell-Height Legalization on CPU-GPU Heterogeneous Systems”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022. (paper) (slides) (video)

• [C135] Zhen Zhuang, Genggeng Liu, Tsung-Yi Ho, Bei Yu, Wenzhong Guo, “TRADER: A Practical Track-Assignment-Based Detailed Router”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022. (paper)

• [C134] Shuyuan Sun, Yiyang Jiang, Fan Yang, Bei Yu, Xuan Zeng, “Efficient Hotspot Detection via Graph Neural Network”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022. (paper)

• [C133] Hao Geng, Tinghuan Chen, Qi Sun, Bei Yu, “Techniques for CAD Tool Parameter Auto-tuning in Physical Synthesis: A Survey”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 17–20, 2022. (paper) (slides) (video) (Invited Paper)

• [J76] Tinghuan Chen, Bin Duan, Qi Sun, Meng Zhang, Guoqing Li, Hao Geng, Qianru Zhang, Bei Yu, “An Efficient Sharing Grouped Convolution via Bayesian Learning”, IEEE Transactions on Neural Networks and Learning Systems (TNNLS), vol. 33, no. 12, pp. 7367–7379, 2022. (paper)

• [J75] Qi Sun, Xufeng Yao, Arjun Ashok Rao, Bei Yu, Shiyan Hu, “Counteracting Adversarial Attacks in Autonomous Driving”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 12, pp. 5193–5206, 2022. (paper)

• [J74] Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng, “Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 11, pp. 4887-4900, 2022. (paper)

• [J73] Wei Li, Yuzhe Ma, Yibo Lin, Bei Yu, “Adaptive Layout Decomposition with Graph Embedding Neural Networks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 11, pp. 5030–5042, 2022. (paper)

• [J72] Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Xiaoqing Wen, “Fortune: A New Fault-Tolerance TSV Configuration in Router-based Redundancy Structure”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3182–3187, 2022. (paper)

• [J71] Martin Rapp, Hussam Amrouch, Yibo Lin, Bei Yu, David Z. Pan, Marilyn Wolf, Jorg Henkel, “MLCAD: A Survey of Research in Machine Learning for CAD”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3162–3181, 2022. (paper) (Keynote Paper)

• [J70] Guojin Chen, Wanli Chen, Qi Sun, Yuzhe Ma, Haoyu Yang, Bei Yu, “DAMO: Deep Agile Mask Optimization for Full Chip Scale”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 9, pp. 3118–3131, 2022. (paper)

• [J69] Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu, “High-Speed Adder Design Space Exploration via Graph Neural Processes”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2657–2670, 2022. (paper)

• [J68] Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu, “Hotspot Detection via Attention-based Deep Layout Metric Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2685–2698, 2022. (paper)

• [J67] Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young, “Neural-ILT 2.0: Migrating ILT to Domain-specific and Multi-task-enabled Neural Network”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2671–2684, 2022. (paper)

• [J66] Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng, “Efficient Layout Hotspot Detection via Neural Architecture Search”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 27, no. 6, 2022. (paper)

• [J65] Tinghuan Chen, Qi Sun, Canhui Zhan, Changze Liu, Huatao Yu, Bei Yu, “Deep H-GCN: Fast Analog IC Aging-induced Degradation Estimation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 7, pp. 1990–2003, 2022. (paper)

• [J64] Yibo Lin, Xiaohan Gao, Tinghuan Chen, Bei Yu, “Machine learning for digital circuit backend design”, Micro/nano Electronics and Intelligent Manufacturing, vol. 2, no. 3, 2022. (in Chinese) (paper)

• [J63] Qi Sun, Tinghuan Chen, Siting Liu, Jianli Chen, Hao Yu, Bei Yu, “Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 27, no. 4, 2022. (paper)

• [J62] Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu, “Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 3, pp. 709–722, 2022. (paper)

• [J61] Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang, Xuan Zeng, Bei Yu, “Faster Region-based Hotspot Detection”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 3, pp. 669–680, 2022. (code) (paper)

• [J60] Haoyu Yang, Shuhe Li, Wen Chen, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu, “DeePattern: Layout Pattern Generation with Transforming Convolutional Auto-Encoder”, IEEE Transactions on Semiconductor Manufacturing (TSM), vol. 35, no. 1, pp. 67–77, 2022. (paper) (Best Paper Award)

• [J59] Haocheng Li, Wing-Kai Chow, Gengjie Chen, Bei Yu, and Evangeline F.Y. Young, “Pin-Accessible Legalization for Mixed-Cell-Height Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 1, pp. 143–154, 2022. (paper)

2021

• [C132] Qi Sun, Chen Bai, Tinghuan Chen, Hao Geng, Xinyun Zhang, Yang Bai, Bei Yu, “Fast and Efficient DNN Deployment via Deep Gaussian Transfer Learning”, IEEE International Conference on Computer Vision (ICCV), Oct. 11–17, 2021. (paper) (supp) (slides) (poster)

• [C131] Ruixing Wang, Xiaogang Xu, Chi-Wing Fu, Jiangbo Lu, Bei Yu, Jiaya Jia, “Seeing Dynamic Scenes in the Dark: A High-Quality Video Dataset with Mechatronic Alignment”, IEEE International Conference on Computer Vision (ICCV), Oct. 11–17, 2021. (paper)

• [C130] Jiequan Cui, Zhisheng Zhong, Shu Liu, Bei Yu, Jiaya Jia, “Parametric Contrastive Learning”, IEEE International Conference on Computer Vision (ICCV), Oct. 11–17, 2021. (paper) (supp) (code)

• [C129] Yang Bai, Xufeng Yao, Qi Sun, Bei Yu, “AutoGTCO: Graph and Tensor Co-Optimize for Image Recognition with Transformers on GPU”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C128] Wenqian Zhao, Qi Sun, Yang Bai, Haisheng Zheng, Wenbo Li, Bei Yu, Martin D.F. Wong, “A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C127] Ran Chen, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Bei Yu, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao, “A Unified Framework for Layout Pattern Analysis with Deep Causal Estimation”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C126] Hao Geng, Fan Yang, Xuan Zeng, Bei Yu, “When Wafer Failure Pattern Classification Meets Few-shot Learning and Self-Supervised Learning”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C125] Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D.F. Wong, “Hotspot Detection via Multi-task Learning and Transformer Encoder”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C124] Guojin Chen, Ziyang Yu, Hongduo Liu, Yuzhe Ma, Bei Yu, “DevelSet: Deep Neural Level Set for Instant Mask optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video)

• [C123] Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, Bei Yu, “Graph Learning-Based Arithmetic Block Identification”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides)

• [C122] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video) (code) (William J. McCalla Best Paper Award)

• [C121] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides) (video) (code)

• [C120] Yifeng Xiao, Miaodi Su, Haoyu Yang, Jianli Chen, Jun Yu, Bei Yu, “Low-Cost Lithography Hotspot Detection with Active Entropy Sampling and Model Calibration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Dec. 5–9, 2021. (paper)

• [C119] Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng, “NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Dec. 5–9, 2021. (paper)

• [C118] Tinghuan Chen, Qi Sun, Bei Yu, “Machine Learning in Nanometer AMS Design for Reliability”, IEEE International Conference on ASIC (ASICON), Kunming, China, Oct. 26–29, 2021. (paper) (slides) (Invited Paper)

• [C117] Haoyu Yang, Shuhe Li, Bei Yu, “Routing Towards Discriminative Power of Class Capsules”, arXiv preprint:2103.04278. (paper)

• [C116] Wei Li, Guojin Chen, Haoyu Yang, Ran Chen, Bei Yu, “Learning Point Clouds in EDA”, ACM International Symposium on Physical Design (ISPD), Mar. 21–Mar. 24, 2021. (paper) (slides) (Invited Paper)

• [C115] Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, “A GPU-enabled Level-Set Method for Mask Optimization”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper) (slides)

• [C114] Qi Sun, Tinghuan Chen, Siting Liu, Jin Miao, Jianli Chen, Hao Yu, Bei Yu, “Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper) (slides) (video) (Best Paper Award Nomination)

• [C113] Qi Sun, Chen Bai, Hao Geng, Bei Yu, “Deep Neural Network Hardware Deployment Optimization via Advanced Active Learning”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper) (slides)

• [C112] Siting Liu, Qi Sun, Peiyu Liao, Yibo Lin, Bei Yu, “Global Placement with Deep Learning-Enabled Explicit Routability Optimization”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper) (slides)

• [C111] Hongjia Li, Mengshu Sun, Tianyun Zhang, Olivia Chen, Nobuyuki Yoshikawa, Bei Yu, Yanzhi Wang, Yibo Lin, “Towards AQFP-Capable Physical Design Automation”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper)

• [C110] Zhuolun He, Peiyu Liao, Siting Liu, Yuzhe Ma, Bei Yu, “Physical Synthesis for Advanced Neural Network Processors”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 18–21, 2021. (paper) (slides) (Invited Paper)

• [C109] Wei Li, Yuxiao Qu, Gengjie Chen, Yuzhe Ma, Bei Yu, “TreeNet: Deep Point Cloud Embedding for Routing Tree Construction”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 18–21, 2021. (paper) (slides) (Best Paper Award)

• [C108] Tinghuan Chen, Qi Sun, Canhui Zhan, Changze Liu, Huatao Yu, Bei Yu, “Analog IC Aging-induced Degradation Estimation via Heterogeneous Graph Convolutional Networks”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 18–21, 2021. (paper) (slides)

• [C107] Haoyu Yang, Shifan Zhang, Kang Liu, Siting Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg, Bei Yu, Evangeline F.Y. Young, “Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 18–21, 2021. (paper) (slides)

• [J58] Wei Li, Yuzhe Ma, Qi Sun, Lu Zhang, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan, “OpenMPL: An Open Source Layout Decomposer”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 11, pp. 2331–2344, 2021. (paper)

• [J57] Haocheng Li, Satwik Patnaik, Mohammed Ashraf, Haoyu Yang, Johann Knechtel, Bei Yu, Ozgur Sinanoglu, Evangeline F.Y. Young, “Deep Learning Analysis for Split Manufactured Layouts with Routing Perturbation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 10, pp. 1995–2008, 2021. (paper)

• [J56] Guyue Huang, Jingbo Hu, Yifan He, Jialong Liu, Mingyuan Ma, Zhaoyang Shen, Juejian Wu, Yuanfan Xu, Hengrui Zhang, Kai Zhong, Xuefei Ning, Yuzhe Ma, Haoyu Yang, Bei Yu, Huazhong Yang, Yu Wang, “Machine Learning for Electronic Design Automation: A Survey”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 5, 2021. (paper)

• [J55] Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng, “Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1476–1488, 2021. (paper)

• [J54] Haoyu Yang, Shuhe Li, Cyrus Tabery, Bingqing Lin, Bei Yu, “Bridging the Gap Between Layout Pattern Sampling and Hotspot Detection via Batch Active Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1464–1475, 2021. (paper) (benchmark)

• [J53] Tinghuan Chen, Bingqing Lin, Hao Geng, Shiyan Hu, Bei Yu, “Leveraging Spatial Correlation for Sensor Drift Calibration in Smart Building”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1273–1286, 2021. (paper)

• [J52] Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu, “VLSI Mask Optimization: From Shallow To Deep Learning”, Integration, the VLSI Journal, vol. 77, Mar., pp. 96–103, 2021. (paper)

• [J51] Xiaowei Xu, Xinyi Zhang, Bei Yu, Xiaobo Sharon Hu, Christopher Rowen, Jingtong Hu, Yiyu Shi, “DAC-SDC Low Power Object Detection Challenge for UAV Applications”, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 43, no. 2, pp. 392–403, 2021. (paper)

2020

• [C106] Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu, “Hotspot Detection via Attention-based Deep Layout Metric Learning”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2–5, 2020. (paper) (slides) (whova)

• [C105] Qi Sun, Arjun Ashok Rao, Xufeng Yao, Bei Yu, Shiyan Hu, “Counteracting Adversarial Attack in Autonomous Driving”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2–5, 2020. (paper) (slides) (whova) (Invited Paper)

• [C104] Guojin Chen, Wanli Chen, Yuzhe Ma, Haoyu Yang, Bei Yu, “DAMO: Deep Agile Mask Optimization for Full Chip Scale”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2–5, 2020. (paper) (slides) (whova)

• [C103] Bentian Jiang, Lixin Liu, Yuzhe Ma, Hang Zhang, Evangeline F. Y. Young, Bei Yu, “Neural-ILT: Migrating ILT to Nerual Networks for Mask Printability and Complexity Co-optimizaton”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2–5, 2020. (paper) (slides) (whova)

• [C102] Zhuolun He, Lu Zhang, Peiyu Liao, Yuzhe Ma, Bei Yu, “Reinforcement Learning Driven Physical Synthesis”, IEEE International Conference on Solid -State and Integrated Circuit Technology (ICSICT), Kunming, Nov. 3–6, 2020. (paper) (Invited Paper)

• [C101] Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong, “Learn to Floorplan through Acquisition of Effective Local Search Heuristics”, IEEE International Conference on Computer Design (ICCD), Oct. 18–21, 2020. (paper) (slides)

• [C100] Wanli Chen, Xinge Zhu, Ruoqi Sun, Junjun He, Ruiyu Li, Xiaoyong Shen, Bei Yu, “Tensor Low-Rank Reconstruction for Semantic Segmentation”, European Conference on Computer Vision (ECCV), August 23–28, 2020. (paper) (slides) (code)

• [C99] Ran Chen, Yong Liu, Mengdan Zhang, Shu Liu, Bei Yu, Yu-Wing Tai, “Dive Deeper Into Box for Object Detection”, European Conference on Computer Vision (ECCV), August 23–28, 2020. (paper) (slides)

• [C98] Wei Li, Jialu Xia, Yuzhe Ma, Jialu Li, Yibo Lin, Bei Yu, “Adaptive Layout Decomposition with Graph Embedding Neural Networks”, ACM/IEEE Design Automation Conference (DAC), San Francisco, July 19–23, 2020. (paper) (slides)

• [C97] Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu, “Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization”, ACM/IEEE Design Automation Conference (DAC), San Francisco, July 19–23, 2020. (paper) (slides)

• [C96] Husheng Zhou, Wei Li, Zelun Kong, Junfeng Guo, Yuqun Zhang, Bei Yu, Lingming Zhang, Cong Liu, “DeepBillboard: Systematic Physical-World Testing of Autonomous Driving Systems”, ACM/IEEE International Conference on Software Engineering (ICSE), Seoul, May 23–29, 2020. (paper)

• [C95] Junpeng Wang, Qi Xu, Bo Yuan, Song Chen, Bei Yu, Feng Wu, “Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems”, IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain, May 17–20, 2020. (paper)

• [C94] Yuzhe Ma, Zhuolun He, Wei Li, Tinghuan Chen, Lu Zhang, Bei Yu, “Understanding Graphs in EDA: From Shallow to Deep Learning”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 25–Apr. 01, 2020. (paper) (Invited Paper)

• [C93] Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu, “VLSI Mask Optimization: From Shallow To Deep Learning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 434–439, Beijing, Jan. 13–16, 2020. (paper) (slides) (Invited Paper)

• [J50] Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu, “A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 12, pp. 5069–5082, 2020. (paper)

• [J49] Grace Li Zhang, Bing Li, Meng Li, Bei Yu, David Z. Pan, Michaela Brunner, Georg Sigl, Ulf Schlichtmann, “TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 12, pp. 4482–4495, 2020. (paper)

• [J48] Hao Geng, Wei Zhong, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu, “SRAF Insertion via Supervised Dictionary Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 10, pp. 2849–2859, 2020. (paper)

• [J47] Haoyu Yang, Shuhe Li, Zihao Deng, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young, “GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 10, pp. 2822–2834, 2020. (paper)

• [J46] Kang Liu, Haoyu Yang, Yuzhe Ma, Benjamin Tan, Bei Yu, Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg, “Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 5, 2020. (paper)

• [J45] Qi Xu, Song Chen, Hao Geng, Bo Yuan, Bei Yu, Feng Wu, Zhengfeng Huang, “Fault Tolerance in Memristive Crossbar-Based Neuromorphic Computing Systems”, Integration, the VLSI Journal, vol. 70, Jan., pp. 70–79, 2020. (paper)

• [J44] Xingquan Li, Bei Yu, Jianli Chen, Wenxing Zhu, “DSA Guiding Template Assignment with Multiple Redundant Via and Dummy Via Insertion”, Integration, the VLSI Journal, vol. 70, Jan., pp. 32–42, 2020. (paper)

2019

• [C92] Qi Sun, Tinghuan Chen, Jin Miao, Bei Yu, “Power-Driven DNN Dataflow Optimization on FPGA”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Westminster, CO, Nov. 4–7, 2019. (paper) (slides) (Invited Paper)

• [C91] Yuzhe Ma, Ran Chen, Wei Li, Fanhua Shang, Wenjian Yu, Minsik Cho, Bei Yu, “A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks”, IEEE International Conference on Tools with Artificial Intelligence (ICTAI), Portland, OR, Nov. 4–6, 2019. (paper) (slides) (Best Student Paper Award)

• [C90] Wei Li, Yuzhe Ma, Qi Sun, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan, “OpenMPL: An Open Source Layout Decomposer”, IEEE International Conference on ASIC (ASICON), Chongqing, China, Oct. 29–Nov. 1, 2019. (paper) (slides) (code) (Invited Paper)

• [C89] Yuzhe Ma, Ziyang Yu, Bei Yu, “CAD Tool Design Space Exploration via Bayesian Optimization”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Alberta, Canada, Sep. 3–4, 2019. (paper) (slides)

• [C88] Haoyu Yang, Wen Chen, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu, “Automatic Layout Generation with Applications in Machine Learning Engine Evaluation”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Alberta, Canada, Sep. 3–4, 2019. (paper) (slides)

• [C87] Zhonghua Zhou, Ziran Zhu, Jianli Chen, Yuzhe Ma, Bei Yu, Tsung-Yi Ho, Guy Lemieux, Andre Ivano, “Congestion-aware Global Routing using Deep Convolutional Generative Adversarial Networks”, ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Alberta, Canada, Sep. 3–4, 2019. (paper)

• [C86] Haoyu Yang, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu, “DeePattern: Layout Pattern Generation with Transforming Convolutional Auto-Encoder”, ACM/IEEE Design Automation Conference (DAC), pp. 148:1–148:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C85] Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu, “High Performance Graph Convolutional Networks with Applications in Testability Analysis”, ACM/IEEE Design Automation Conference (DAC), pp. 18:1–18:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C84] Tinghuan Chen, Bingqing Lin, Hao Geng, Bei Yu, “Sensor Drift Calibration via Spatial Correlation Model in Smart Building”, ACM/IEEE Design Automation Conference (DAC), pp. 105:1–105:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C83] Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Xuan Zeng, Bei Yu, “Faster Region-based Hotspot Detection”, ACM/IEEE Design Automation Conference (DAC), pp. 146:1–146:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster) (code)

• [C82] Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng, “Efficient Layout Hotspot Detection via Binarized Residual Neural Network”, ACM/IEEE Design Automation Conference (DAC), pp. 147:1–147:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C81] Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu, “Attacking Split Manufacturing from a Deep Learning Perspective”, ACM/IEEE Design Automation Conference (DAC), pp. 135:1–135:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C80] Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F. Y. Young, Bei Yu, “FIT: Fill Insertion Considering Timing”, ACM/IEEE Design Automation Conference (DAC), pp. 221:1–221:6, Las Vegas, NV, June 2–6, 2019. (paper) (slides) (poster)

• [C79] Haoyu Yang, Piyush Pathak, Frank E. Gennari, Ya-Chieh Lai, Bei Yu, “Hotspot Detection using Squish-Net”, SPIE Intl. Symp. Advanced Lithography Conference, San Jose, Feb. 24–28, 2019. (paper) (slides)

• [C78] Haoyu Yang, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu, “Detecting Multi-Layer Layout Hotspots with Adaptive Squish Patterns”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 299–304, Tokyo, Jan. 21–24, 2019. (paper) (slides) (Invited Paper)

• [C77] Xingquan Li, Bei Yu, Jianli Chen, Wenxing Zhu, “A Local Optimal Method on DSA Guiding Template Assignment with Redundant/Dummy Via Insertion”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 305–310, Tokyo, Jan. 21–24, 2019. (paper) (slides) (Invited Paper)

• [C76] Hao Geng, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu, “SRAF Insertion via Supervised Dictionary Learning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 406–411, Tokyo, Jan. 21–24, 2019. (paper) (slides) (Best Paper Award Nomination)

• [C75] Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Biying Xu, Lu Zhang, Bei Yu, Ray T. Chen, David Z. Pan, “Hardware-software Co-design of Slimmed Optical Neural Networks”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 705–710, Tokyo, Jan. 21–24, 2019. (paper) (slides)

• [J43] Yuzhe Ma, Subhendu Roy, Jin Miao, Jiamin Chen, Bei Yu, “Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 12, pp. 2298–2311, 2019. (paper)

• [J42] Qi Xu, Hao Geng, Song Chen, Bei Yu, Feng Wu, “Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 1, pp. 8:1–8:19, 2019. (paper)

• [J41] Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan, “A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 9, pp. 1585–1598, 2019. (paper)

• [J40] Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan, “Provably Secure Camouflaging Strategy for IC Protection”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 8, pp. 1399–1412, 2019. (paper)

• [J39] Haoyu Yang, Jing Su, Yi Zou, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young, “Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 6, pp. 1175–1187, 2019. (paper) (code)

• [J38] Derong Liu, Bei Yu, Vinicius Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan, “Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 6, pp. 1147–1160, 2019. (paper)

• [J37] Song Chen, Qi Xu, Bei Yu, “Adaptive 3D-IC TSV Fault Tolerance Structure Generation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 5, pp. 949–960, 2019. (paper)

• [J36] Qianru Zhang, Meng Zhang, Tinghuan Chen, Zhifei Sun, Yuzhe Ma, Bei Yu, “Recent Advances in Convolutional Neural Network Acceleration”, Neurocomputing, vol. 323, pp. 37–51, Jan., 2019. (paper)

2018

• [C74] Hao Geng, Haoyu Yang, Bei Yu, Xingquan Li, Xuan Zeng, “Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 488–493, Hong Kong, July 9–11, 2018. (paper) (Invited Paper)

• [C73] Haoyu Yang, Shuhe Li, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young, “GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets”, ACM/IEEE Design Automation Conference (DAC), pp. 131:1–131:6, San Francisco, June 24–28, 2018. (paper) (slides) (poster) (data)

• [C72] Haocheng Li, Wing-Kai Chow, Gengjie Chen, Evangeline F. Y. Young, Bei Yu, “Routability-Driven and Fence-Aware Legalization for Mixed-Cell-Height Circuits”, ACM/IEEE Design Automation Conference (DAC), pp. 150:1–150:6, San Francisco, June 24–28, 2018. (paper) (slides) (poster)

• [C71] Fengxian Jiao, Sheqin Dong, Bei Yu, Bing Li, Ulf Schlichtmann, “Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips”, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4, Florence, May 27–30, 2018. (paper)

• [C70] Qi Xu, Song Chen, Bei Yu, Feng Wu, “Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 451–454, Chicago, IL, May 23–25, 2018. (paper)

• [C69] Wei Ye, Meng Li, Kai Zhong, Bei Yu, David Z. Pan, “Power Grid Reduction by Sparse Convex Optimization”, ACM International Symposium on Physical Design (ISPD), pp. 60–67, Monterey, Mar. 25–28, 2018. (paper) (slides)

• [C68] Grace Li Zhang, Bing Li, Bei Yu, David Z. Pan, Ulf Schlichtmann, “TimingCamouflage: Improving Circuit Security against Counterfeiting by Unconventional Timing”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), pp. 91–96, Dresden, Mar. 19–23, 2018. (paper) (slides)

• [C67] Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan, “A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 265–270, Jeju Island, Jan. 22–25, 2018. (paper) (slides)

• [J35] Xingquan Li, Bei Yu, Jiaojiao Ou, Jianli Chen, David Z. Pan, Wenxing Zhu, “Graph Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 26, no. 11, pp. 2504–2517, 2018. (paper)

• [J34] Jian Kuang, Evangeline F. Y. Young, Bei Yu, “CRMA: Incorporating Cut Redistribution with Mask Assignment to Enable the Fabrication of 1D Gridded Design”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 10, pp. 2036–2049, 2018. (paper)

• [J33] Gengjie Chen, Chak-Wa Pui, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Evangeline F. Y. Young, Bei Yu, “RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 10, pp. 2022–2035, 2018. (paper)

• [J32] Yibo Lin, Bei Yu, Meng Li, David Z. Pan, “Layout Synthesis for Topological Quantum Circuits with 1D and 2D Architectures”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 8, pp. 1574–1587, 2018. (paper)

• [J31] Shiyan Hu, Bei Yu, Huafeng Yu, “Guest Editorial on Special Issue on Sustainable Cyber-Physical Systems”, IEEE Transactions on Sustainable Computing (TSUSC), vol. 3, no. 2, pp. 58–59, 2018.

• [J30] Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan, “MrDP: Multiple-row Detailed Placement of Heterogeneous-sized Cells for Advanced Nodes”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 6, pp. 1237–1250, 2018. (paper)

• [J29] Jin Miao, Meng Li, Subhendu Roy, Yuzhe Ma, Bei Yu, “SD-PUF: Spliced Digital Physical Unclonable Function”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 5, pp. 927–940, 2018. (paper)

• [J28] Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan, “TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew Violations”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 1, pp. 231–244, 2018. (paper)

• [J27] Xiaotao Jia, Yici Cai, Qiang Zhou, Bei Yu, “A Multi-Commodity Flow based Detailed Router with Efficient Acceleration Techniques”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 1, pp. 217–230, 2018. (paper)

2017

• [C66] Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, Evangeline F. Y. Young, Bei Yu, “Clock-Aware UltraScale FPGA Placement with Machine Learning Routability Prediction”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 929–936, Irvine, Nov. 13–16, 2017. (paper) (slides) (Invited Paper)

• [C65] Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu, “A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 81–88, Irvine, Nov. 13–16, 2017. (paper) (slides)

• [C64] Yuzhe Ma, Xuan Zeng, Bei Yu, “Methodologies for Layout Decomposition and Mask Optimization: A Systematic Review”, IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Abu Dhabi, UAE, Oct. 23–25, 2017. (paper) (Invited Paper)

• [C63] Cheng Zhuo, Bei Yu, Di Gao, “Accelerating Chip Design with Machine Learning: From Pre-Silicon to Post-Silicon”, IEEE International System-on-Chip Conference (SOCC), pp. 227–232, Munich, Germany, September 5–8, 2017. (paper) (Invited Paper)

• [C62] Haoyu Yang, Yajun Lin, Bei Yu, Evangeline F. Y. Young, “Lithography Hotspot Detection: From Shallow To Deep Learning”, IEEE International System-on-Chip Conference (SOCC), pp. 233–238, Munich, Germany, September 5–8, 2017. (paper) (Invited Paper)

• [C61] Subhendu Roy, Yuzhe Ma, Jin Miao, Bei Yu, “A Learning Bridge from Architectural Synthesis to Physical Design for Exploring Power Efficient High-Performance Adders”, IEEE International Symposium on Low Power Electronics and Design (ISLPED), Taipei, July 24–26, 2017. (paper) (slides)

• [C60] Haoyu Yang, Jing Su, Yi Zou, Bei Yu, Evangeline F. Y. Young, “Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning”, ACM/IEEE Design Automation Conference (DAC), pp. 62:1–62:6, Austin, June 18–22, 2017. (paper) (slides) (poster)

• [C59] Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu, “Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design”, ACM/IEEE Design Automation Conference (DAC), pp. 70:1–70:6, Austin, June 18–22, 2017. (paper) (slides) (poster)

• [C58] Soumi Chattopadhyay, Ansuman Banerjee, Bei Yu, “A Utility-Driven Data Transmission Optimization Strategy in Large Scale Cyber-Physical Systems”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), pp. 1619–1622, Lausanne, Mar. 27–31, 2017. (paper)

• [C57] Hang Zhang, Fengyuan Zhu, Haocheng Li, Evangeline F. Y. Young, Bei Yu, “Bilinear Lithography Hotspot Detection”, ACM International Symposium on Physical Design (ISPD), pp. 7–14, Portland, OR, Mar. 19–22, 2017. (paper) (Best Paper Award)

• [C56] Jiaojiao Ou, Bei Yu, Xiaoqing Xu, Joydeep Mitra, Yibo Lin, David Z. Pan, “DSAR: DSA aware Routing with Simultaneous DSA Guiding Pattern and Double Patterning Assignment”, ACM International Symposium on Physical Design (ISPD), pp. 91–98, Portland, OR, Mar. 19–22, 2017. (paper) (slides)

• [C55] Haoyu Yang, Luyang Luo, Jing Su, Chenxi Lin, Bei Yu, “Imbalance Aware Lithography Hotspot Detection: A Deep Learning Approach”, SPIE Intl. Symp. Advanced Lithography Conference, San Jose, Feb. 26–Mar. 2, 2017. (paper) (slides)

• [J26] Haoyu Yang, Luyang Luo, Jing Su, Chenxi Lin, Bei Yu, “Imbalance Aware Lithography Hotspot Detection: A Deep Learning Approach”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 16, no. 3, 033504, 2017. (paper)

• [J25] Yibo Lin, Xiaoqing Xu, Bei Yu, Ross Baldick, David Z. Pan, “Triple/Quadruple Patterning Layout Decomposition via Novel Linear Programming and Iterative Rounding”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 16, no. 2, 023507, 2017. (paper)

• [J24] Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan, “Incremental Layer Assignment for Timing Optimization”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 22, no. 75, pp. 75:1–75:25, 2017. (paper)

• [J23] Yibo Lin, Bei Yu, David Z. Pan, “High Performance Dummy Fill Insertion with Coupling and Uniformity Constraints”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 9, pp. 1532–1544, 2017. (paper)

• [J22] Qi Xu, Song Chen, Xiaodong Xu, Bei Yu, “Clustered Fault Tolerance TSV Planning for 3D Integrated Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 8, pp. 1287–1300, 2017. (paper)

• [J21] Yibo Lin, Bei Yu, Biying Xu, David Z. Pan, “Triple Patterning Aware Detailed Placement Toward Zero Cross-Row Middle-of-Line Conflict”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 7, pp. 1140–1152, 2017. (paper)

• [J20] Vinicius Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, Jose Luis Guntzel, Luiz C. V. dos Santos, “Incremental Layer Assignment Driven by an External Signoff Timing Engine”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 7, pp. 1126–1139, 2017. (paper)

• [J19] Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan, “Stitch Aware Detailed Placement for Multiple E-Beam Lithography”, Integration, the VLSI Journal, vol. 58, June, pp. 47–54, 2017. (paper) (Best Paper Award)

• [J18] Meikang Qiu, Saurabh Garg, Rujkumar Buyya, Bei Yu, Shiyan Hu, “Special Issue on Scalable Cyber-Physical Systems”, Journal of Parallel and Distributed Computing (JPDC), vol. 103, pp. 1–2, May 2017.

• [J17] Bingqing Lin, Bei Yu, “Smart Building Uncertainty Analysis via Adaptive Lasso”, IET Cyber-Physical Systems: Theory & Applications (IET-CPS), vol. 2, no. 1, pp. 1–7, 2017. (paper)

2016

• [C54] Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Jian Kuang, Ka-Chun Lam, Peishan Tu, Hang Zhang, Evangeline F. Y. Young, Bei Yu, “RippleFPGA: A Routability-Driven Placement for Large-Scale Heterogeneous FPGAs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 67:1–67:8, Austin, Nov. 7–10, 2016. (paper) (slides) (Invited Paper)

• [C53] Jian Kuang, Evangeline F. Y. Young, Bei Yu, “Incorporating Cut Redistribution with Mask Assignment to Enable 1D Gridded Design”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 48:1–48:8, Austin, Nov. 7–10, 2016. (paper) (slides)

• [C52] Hang Zhang, Bei Yu, Evangeline F. Y. Young, “Enabling Online Learning in Lithography Hotspot Detection with Information-Theoretic Feature Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 47:1–47:8, Austin, Nov. 7–10, 2016. (paper) (slides)

• [C51] Jin Miao, Meng Li, Subhendu Roy, Bei Yu, “LRR-DPUF: Learning Resilient and Reliable Digital Physical Unclonable Function”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 46:1–46:8, Austin, Nov. 7–10, 2016. (paper) (slides)

• [C50] Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan, “Provably Secure Camouflaging Strategy for IC Protection”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 28:1–28:8, Austin, Nov. 7–10, 2016. (paper) (slides)

• [C49] Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan, “MrDP: Multiple-row Detailed Placement of Heterogeneous-sized Cells for Advanced Nodes”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 7:1–7:8, Austin, Nov. 7–10, 2016. (paper) (slides)

• [C48] Yibo Lin, Bei Yu, David Z. Pan, “Detailed Placement In Advanced Technology Nodes: A Survey”, IEEE International Conference on Solid -State and Integrated Circuit Technology (ICSICT), Hangzhou, Oct. 25–28, 2016. (paper) (Invited Paper)

• [C47] Hang Zhang, Haoyu Yang, Bei Yu, Evangeline F. Y. Young, “VLSI Layout Hotspot Detection Based on Discriminative Feature Extraction”, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Jeju, Oct. 25–28, 2016. (Invited Paper)

• [C46] Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan, “Incremental Layer Assignment for Critical Path Timing”, ACM/IEEE Design Automation Conference (DAC), pp. 85:1–85:6, Austin, June 5–9, 2016. (paper) (slides) (poster)

• [C45] Xiaotao Jia, Qiang Zhou, Yici Cai, Bei Yu, “MCFRoute 2.0: A Redundant Via Insertion Enhanced Concurrent Detailed Router”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 87–92, Boston, MA, May 18–20, 2016. (paper) (slides)

• [C44] Jiaojiao Ou, Bei Yu, David Z. Pan, “Concurrent Guiding Template Assignment and Redundant Via Insertion for DSA-MP Hybrid Lithography”, ACM International Symposium on Physical Design (ISPD), pp. 39–46, Sonoma, April 3–6, 2016. (paper) (slides)

• [C43] Yibo Lin, Xiaoqing Xu, Bei Yu, Ross Baldick, David Z. Pan, “Triple/Quadruple Patterning Layout Decomposition via Novel Linear Programming and Iterative Rounding”, SPIE Intl. Symp. Advanced Lithography Conference, San Jose, Feb. 21–25, 2016. (paper) (slides) (Best Student Paper Award)

• [C42] Tetsuaki Matsunawa, Bei Yu, David Z. Pan, “Laplacian Eigenmaps and Bayesian Clustering Based Layout Pattern Sampling and Its Applications to Hotspot Detection and OPC”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 679–684, Macau, Jan. 25–28, 2016. (paper) (slides)

• [C41] Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan, “Stitch Aware Detailed Placement for Multiple E-Beam Lithography”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 186–191, Macau, Jan. 25–28, 2016. (paper) (slides)

• [J16] Tetsuaki Matsunawa, Bei Yu, David Z. Pan, “Laplacian Eigenmaps and Bayesian Clustering Based Layout Pattern Sampling and Its Applications to Hotspot Detection and OPC”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 4, 043504, 2016. (paper)

• [J15] Bei Yu, Xiaoqing Xu, Subhendu Roy, Yibo Lin, Jiaojiao Ou, David Z. Pan, “Design for Manufacturability and Reliability in Extreme-Scaling VLSI”, Science China Information Sciences (SCIS), vol.59, June, 061406:2, 2016. (paper)

• [J14] Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan, “EBL Overlapping aware Stencil Planning for MCC System”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 21, no. 3, pp. 43:1–43:24, 2016. (paper)

• [J13] Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan, “PARR: Pin Access Planning and Regular Routing for Self-Aligned Double Patterning”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 21, no. 3, pp. 42:1–42:21, 2016. (paper)

• [J12] Tetsuaki Matsunawa, Bei Yu, David Z. Pan, “Optical Proximity Correction with Hierarchical Bayes Model”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 2, 021009, 2016. (paper)

• [J11] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan, “Systematic Framework for Evaluating Standard Cell Middle-Of-Line (MOL) Robustness for Multiple Patterning Lithography”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 2, 021202, 2016. (paper)

2015

• [C40] Bei Yu, Derong Liu, Salim Chowdhury, David Z. Pan, “TILA: Timing-Driven Incremental Layer Assignment”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 110–117, Austin, Nov. 2–6, 2015. (paper) (slides)

• [C39] Yibo Lin, Bei Yu, Biying Xu, David Z. Pan, “Triple Patterning Aware Detailed Placement Toward Zero Cross-Row Middle-of-Line Conflict”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 396–403, Austin, Nov. 2–6, 2015. (paper) (slides)

• [C38] David Z. Pan, Lars Liebmann, Bei Yu, Xiaoqing Xu, Yibo Lin, “Pushing Multiple Patterning in Sub-10nm: Are We Ready?”, ACM/IEEE Design Automation Conference (DAC), pp. 197:1–197:6, San Francisco, June 7–11, 2015. (paper) (Invited Paper)

• [C37] Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan, “PARR: Pin Access Planning and Regular Routing for Self-Aligned Double Patterning”, ACM/IEEE Design Automation Conference (DAC), pp. 28:1–28:6, San Francisco, June 7–11, 2015. (paper) (slides)

• [C36] Yibo Lin, Bei Yu, David Z. Pan, “High Performance Dummy Fill Insertion with Coupling and Uniformity Constraints”, ACM/IEEE Design Automation Conference (DAC), pp. 71:1–71:6, San Francisco, June 7–11, 2015. (paper) (slides)

• [C35] Wei Ye, Bei Yu, Yong-Chan Ban, Lars Liebmann, David Z. Pan, “Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 289–294, Pittsburgh, PA, May 20–22, 2015. (paper) (slides)

• [C34] Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, Moshe Preil, Azat Latypov, David Z. Pan, “Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 83–86, Pittsburgh, PA, May 20–22, 2015. (paper)

• [C33] Tetsuaki Matsunawa, Bei Yu, David Z. Pan, “Optical Proximity Correction with Hierarchical Bayes Model”, SPIE Intl. Symp. Advanced Lithography - Optical Microlithography XXVIII, San Jose, Feb. 22–26, 2015. (paper) (slides)

• [C32] Tetsuaki Matsunawa, Jhih-Rong Gao, Bei Yu, David Z. Pan, “A New Lithography Hotspot Detection Framework Based on AdaBoost Classifier and Simplified Feature Extraction”, SPIE Intl. Symp. Advanced Lithography - Design-Process-Technology Co-optimization for Manufacturability IX, San Jose, Feb. 22–26, 2015. (paper) (slides)

• [C31] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan, “A Systematic Framework for Evaluating Standard Cell Middle-Of-Line (MOL) Robustness for Multiple Patterning”, SPIE Intl. Symp. Advanced Lithography - Design-Process-Technology Co-optimization for Manufacturability IX, San Jose, Feb. 22–26, 2015. (paper)

• [C30] Bei Yu, David Z. Pan, Tetsuaki Matsunawa, Xuan Zeng “Machine Learning and Pattern Matching in Physical Design”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 286–293, Japan, Jan. 19–22, 2015. (paper) (slides) (Invited Paper)

• [C29] Jiwoo Pak, Bei Yu, David Z. Pan, “Electromigration-aware Redundant Via Insertion”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 544–549, Japan, Jan. 19–22, 2015. (paper) (slides)

• [J10] Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, David Z. Pan, “Directed Self-Assembly Cut Mask Assignment for 1D Design”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 3, 031211, 2015. (paper)

• [J9] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan, “Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 5, pp. 699–712, 2015. (paper)

• [J8] Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Yibo Lin, Zhuo Li, Charles Alpert, David Z. Pan, “Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 5, pp. 726–739, 2015. (paper)

• [J7] Bei Yu, Kun Yuan, Duo Ding, David Z. Pan, “Layout Decomposition for Triple Patterning Lithography”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 3, pp. 433–446, 2015. (paper)

• [J6] Bei Yu, Jhih-Rong Gao, Duo Ding, Xuan Zeng, David Z. Pan, “Accurate Lithography Hotspot Detection based on PCA-SVM Classifier with Hierarchical Data Clustering”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 1, 011003, 2015. (paper)

• [J5] Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan, “Triple-patterning lithography (TPL) layout decomposition using end-cutting”, Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 1, 011002, 2015. (paper)

2014

• [C28] Bei Yu, Gilda Garreton, David Z. Pan, “Layout Compliance for Triple Patterning Lithography: An Iterative Approach”, SPIE/BACUS Photomask Symposium, Monterey, Sept. 16–18, 2014. (paper) (slides) (Invited Paper)

• [C27] Bei Yu, David Z. Pan, “Layout Decomposition for Quadruple Patterning Lithography and Beyond”, SRC Techcon Conference, Austin, Sept. 7–9, 2014. (paper)

• [C26] Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan, “MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction”, ACM/IEEE Design Automation Conference (DAC), pp. 52:1–52:6, San Francisco, June 1–5, 2014. (paper) (slides) (Best Paper Award Nomination)

• [C25] Bei Yu, David Z. Pan, “Layout Decomposition for Quadruple Patterning Lithography and Beyond”, ACM/IEEE Design Automation Conference (DAC), pp. 53:1–53:6, San Francisco, June 1–5, 2014. (paper) (slides) (poster)

• [C24] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan, “Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization”, ACM International Symposium on Physical Design (ISPD), pp. 101–108, Petaluma, March 30–April 2, 2014. (paper)

• [C23] Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan, “Accurate Lithography Hotspot Detection Based on PCA-SVM Classifier with Hierarchical Data Clustering”, SPIE Intl. Symp. Advanced Lithography - Design-Process-Technology Co-optimization for Manufacturability VIII, San Jose, Feb. 23–27, 2014. (paper)

• [C22] Bei Yu, Jhih-Rong Gao, Xiaoqing Xu, David Z. Pan, “Bridging the Gap from Mask to Physical Design for Multiple Patterning Lithography”, SPIE Intl. Symp. Advanced Lithography - Design-Process-Technology Co-optimization for Manufacturability VIII, San Jose, Feb. 23–27, 2014. (paper) (Invited Paper)

• [C21] Jhih-Rong Gao, Bei Yu, David Z. Pan, “Self-aligned Double Patterning Layout Decomposition with Complementary E-Beam Lithography”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 143–148, Singapore, Jan. 20–23, 2014. (paper) (slides)

2013

• [C20] Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan, “Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 349–356, San Jose, Nov. 18–21, 2013. (paper) (slides) (William J. McCalla Best Paper Award)

• [C19] Bei Yu, Yen-Hung Lin, Gerard Luk-Pat, Duo Ding, Kevin Lucas, David Z. Pan, “A High-Performance Triple Patterning Layout Decomposer with Balanced Density”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 163–169, San Jose, Nov. 18–21, 2013. (paper) (slides)

• [C18] Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan, “Lithography Hotspot Detection and Mitigation in Nanometer VLSI”, IEEE International Conference on ASIC (ASICON), pp. 1–4, Shenzhen, China, Oct. 28–31, 2013. (paper) (Invited Paper)

• [C17] Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan, “E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System”, ACM/IEEE Design Automation Conference (DAC), pp. 70:1–70:7, Austin, June 2–6, 2013. (paper) (slides) (poster)

• [C16] Bei Yu, Jhih-Rong Gao, David Z. Pan, “Triple-Patterning Lithography (TPL) Layout Decomposition Using End-Cutting”, SPIE Intl. Symp. Advanced Lithography, San Jose, Feb. 24–28, 2013. (paper) (slides)

• [C15] Jhih-Rong Gao, Bei Yu, Ru Huang, David Z. Pan, “Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement”, SPIE Intl. Symp. Advanced Lithography, San Jose, Feb. 24–28, 2013. (paper)

• [C14] Bei Yu, Jhih-Rong Gao, David Z. Pan, “L-Shape based Layout Fracturing for E-Beam Lithography”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 249–254, Japan, Jan. 22–25, 2013. (paper) (slides) (Best Paper Award Nomination)

• [J4] David Z. Pan, Bei Yu, Jhih-Rong Gao, “Design for Manufacturing with Emerging Nanolithography”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 10, pp. 1453–1472, 2013. (paper) (Keynote Paper)

2012

• [C13] Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan, “Dealing with IC Manufacturability in Extreme Scaling”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 240–242, San Jose, Nov. 5–8, 2012. (paper) (Embedded Tutorial paper)

• [C12] Yen-Hung Lin, Bei Yu, David Z. Pan, Yih-Lang Li, “TRIAD: A Triple Patterning Lithography Aware Detailed Router”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 123–129, San Jose, Nov. 5–8, 2012. (paper)

• [C11] David Z. Pan, Jhih-Rong Gao, Bei Yu, “VLSI CAD for Emerging Nanolithography”, International Symposium on VLSI Design, Automation and Test (VLSI-DAT), pp. 1–4, 2012. (paper) (Invited Paper)

• [C10] Kevin Lucas, Chris Cork, Bei Yu, Gerry Luk-Pat, Ben Painter, David Z. Pan, “Implications of Triple Patterning for 14 nm Node Design and Patterning”, SPIE Advanced Lithography Symposium Design for Manufacturability through Design-Process Integration VI (Conference 8327), Feb. 2012. (paper) (Keynote Paper)

• [C9] Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan, “EPIC: Efficient Prediction of IC Manufacturing Hotspots With A Unified Meta-Classification Formulation”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 263–270, Sydney, Australia, Jan. 30–Feb. 3, 2012. (paper) (Best Paper Award)

• [C8] Duo Ding, Bei Yu, David Z. Pan, “GLOW: A Global Router for Low-Power Thermal-reliable Interconnect Synthesis using Photonic Wavelength Multiplexing”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 621–626, Sydney, Australia, Jan. 30–Feb. 3, 2012. (paper)

• [J3] Kun Yuan, Bei Yu, David Z. Pan, “E-Beam Lithography Stencil Planning and Optimization with Overlapped Characters”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 31, no. 2, pp. 167–179, Feb. 2012. (paper)

• [J2] Wei Zhong, Takeshi Yoshimura, Bei Yu, Song Chen, Sheqin Dong, Satoshi Goto, “Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips”, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-C, no. 4, pp. 535–545, 2012. (paper)

2011

• [C7] Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan, “Triple Patterning Lithography Layout Decomposition”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1–8, San Jose, Nov. 2011. (paper) (poster) (slides) (William J. McCalla Best Paper Award Nomination)

• [C6] Bei Yu, Sheqin Dong, Yuchun Ma, Tao Lin, Yu Wang, Song Chen, Satoshi Goto, “Network Flow-based Simultaneous Retiming and Slack Budgeting for Low Power Design”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 473–478, Japan, Jan. 2011. (paper) (slides)

• [C5] Wei Zhong, Bei Yu, Song Chen, Takeshi Yoshimura, Sheqin Dong, Satoshi Goto, “Application- Specific Network-on-Chip Synthesis: Cluster Generation and Network Component Insertion”, IEEE International Symposium on Quality Electronic Design (ISQED), pp. 144–149, Santa Clara, March 14–16, 2011. (paper)

2010

• [C4] Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto, “Floorplanning and Topology Generation for Application-Specific Network-on-Chip”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 535–540, Taipei, Jan. 2010. (paper) (slides)

• [C3] Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi Goto, “A Revisit to Voltage Partitioning Problem”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 115–118, Providence, RI, May 16–18, 2010. (paper)

2009

• [C2] Bei Yu, Sheqin Dong, Satoshi Goto, “Multi-Voltage and Level-Shifter Assignment Driven Floorplanning”, IEEE International Conference on ASIC (ASICON), pp. 1264–1267, Changsha, Oct. 20–23, 2009. (paper)

• [C1] Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto, “Voltage-Island Driven Floorplanning Considering Level-Shifter Positions”, ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 51–56, Boston, MA, May 10–12, 2009. (paper)

• [J1] Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto, “Voltage and Level-Shifter Assignment Driven Floorplanning”, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 12, Dec. 2009. (paper)

Books / Book Chapters

[B4] Haoyu Yang, Yibo Lin, Bei Yu, “Machine Learning for Mask Synthesis and Verification”, in Machine Learning Applications in Electronic Design Automation, Mark Ren eds., Springer, 2022. (paper)

[B3] Shiyan Hu, Bei Yu, “Big Data Analytics for Cyber-Physical Systems”, Springer, 2020.

[B2] Bei Yu, David Z. Pan, “Design for Manufacturability with Advanced Lithography”, Springer, 2016.

[B1] Bei Yu, David Z. Pan, “Layout Decomposition for Triple Patterning”, in Encyclopedia of Algorithms, M.-Y. Kao eds., Springer, 2015. (paper)

Dissertation

• [PHD] Bei Yu, “Design for Manufacturing with Advanced Lithography”, Ph.D. Dissertation at University of Texas at Austin, August 2014. (paper) (EDAA Outstanding Dissertation Award)

Newsletters

• [N5] Qi Sun, Arjun Ashok Rao, Xufeng Yao, Bei Yu, Shiyan Hu, “Counteracting Adversarial Attacks in Autonomous Driving”, IEEE TCCPS Newsletter, Volume 05, Issue 02, Nov. 2020.

• [N4] Qi Sun, Tinghuan Chen, Jin Miao, Bei Yu, “Power-Driven DNN Dataflow Optimization on FPGA”, IEEE TCCPS Newsletter, Volume 05, Issue 01, Mar. 2020.

• [N3] Bei Yu, “Design for Manufacturability: From Ad Hoc Solution To Extreme Regular Design”, VLSI Circuits and Systems Letter, Volume 1, Issue 2, Oct. 2015. (pdf)

• [N2] Bei Yu, Gilda Garreton, David Z. Pan, “Layout Compliance for Triple Patterning Lithography: An Iterative Approach”, SPIE Newsroom.

• [N1] Kevin Lucas, Chris Cork, Bei Yu, David Pan, Gerry Luk-Pat, Alex Miloslavsky, Ben Painter, “Triple patterning in 10nm Node Metal Lithography”, SPIE Newsroom. (pdf)