Evangeline Young received her B.Sc. and M.Phil. degree in Computer Science
from The Chinese University of Hong Kong and received her Ph.D. degree from
The University of Texas at Austin in 1999. BTW, she accepted Jesus on
Oct 20, 1996.
She joined the Department of Computer Science and Engineering
in the Chinese University of Hong Kong as an assistant professor in 1999 and is now a professor
in the same department. Her research interests include CAD of VLSI circuits, algorithms and
combinatorial optimization. She has served in the program committees of
and the editorial boards of
ACM TODAES and
Integration, the VLSI Journal.
In 2017, we received Best Paper Awards for the following publications:
Gengjie Chen, Peishan Tu, Evangeline F. Y. Young,
"SALT: Provably good routing topology by a novel steiner shallow-light tree algorithm", ICCAD 2017: 569-576.
Hang Zhang, Fengyuan Zhu, Haocheng Li, Evangeline F. Y. Young, Bei Yu:
"Bilinear Lithography Hotspot Detection", ISPD 2017: 7-14.
Peishan Tu, Wing-Kai Chow, Evangeline F. Y. Young,
"Timing driven routing tree construction", SLIP 2017: 1-8.
Her group has recently won the championships in the
2016 CAD Contest at ICCAD on NP3: Non-exact Projective NPNP Boolean Matching and
2015 CAD Contest at ICCAD on 3D-ICON: 3D Interlayer Cooling Optimized Network..
They also won the first runner up in the 2016 ISPD Routability-Driven FPGA Placement Contest.
They won the second runner up in the 2017 ISPD Clock-Aware FPGA Placement Contest, 2015 CAD Contest at ICCAD on Incremental Timing-driven Placement and the 2015 ISPD Detailed Routing-driven Placement Contest.
In 2013, her group won the championships in the
2013 CAD Contest at ICCAD on both Placement Finishing and Mask Optimization.(CUHK has historically won ALL the championships in this contest!) In 2012, her group won the second place in
2012 CAD Contest at ICCAD on Design Hierarchy Aware Routability-driven Placement.
In the past, they had also won the championship in the
ISPD 2011 Routability-Driven Placement Contest
(EETimes Coverage), the second place in the DAC 2012 Routability-Driven Placement Contest and the first runner-up in the
ISPD 2010 High Performance Clock Network Synthesis Contest
ISPD 2018 Call for Participation
CEDA Hong Kong
Department of Computer Science and Engineering
The Chinese University of Hong Kong
Shatin, New Territories, Hong Kong.