How Physical Synthesis Flows
|Title:||How Physical Synthesis Flows|
|Date:||July 24, 2019 (Wednesday)|
|Time:||2:30 pm - 3:30 pm|
|Venue:||Room 121, 1/F, Ho Sin-Hang Engineering Building, The Chinese University of Hong Kong, Shatin, N.T.|
|Speaker:|| Dr. Patrick Groeneveld
In this talk we will analyze how form follows function in physical design. Analyzing recent mobile chips and chips for self-driving cars we can reason about the structure of advanced billion transistor systems. The strength and weaknesses of the hierarchical abstractions will be matched with the sweet spots of the core physical synthesis algorithms. These algorithms are chained in a physical design flow that consists of hundreds of steps, each of which may have unexpected interactions. Trading off multiple conflicting objectives such as area, speed and power is sometimes more an art than a science. The presentation will present the underlying principles that eventually lead to design closure.
Before working at Cadence and Synopsys, Patrick Groeneveld was Chief Technologist at Magma Design Automation where he was part of the team that developed a groundbreaking RTL-to-GDS2 synthesis product. Patrick was also a Full Professor of Electrical Engineering at Eindhoven University. He is currently teaching at in the EE department at Stanford University and also serves as finance chair in the Executive Committee of the Design Automation Conference. Patrick received his MSc and PhD degrees from Delft University of Technology in the Netherlands. In his spare time, Patrick enjoys flying airplanes, running, electric vehicles, tinkering and reading useless information.
Enquiries: Ms. Shirley Lau at tel. 3943 8439
For more information, please refer to http://www.cse.cuhk.edu.hk/en/events