The RSFQ Routing Problem: Recent Advances and New Challenges
|Title:||The RSFQ Routing Problem: Recent Advances and New Challenges|
|Date:||June 20, 2019 (Thursday)|
|Time:||3:30 pm - 4:30 pm|
|Venue:||Room 703, 7/F, William M W Mong Engineering Building, The Chinese University of Hong Kong, Shatin, N.T.|
|Speaker:|| Prof. HO Tsung-Yi
With the increasing clock frequencies, the timing requirement of Rapid Single Flux Quantum (RSFQ) digital circuits is critical for achieving the correct functionality. To meet this requirement, it is necessary to incorporate length-matching constraint into routing problem. However, the solutions of existing routing algorithms are inherently limited by pre-allocated splitters (SPLs), which complicates the subsequent routing stage under length-matching constraint. To tackle this problem, we reallocate SPLs to fully utilize routing resources to cope with length-matching effectively. Furthermore, we propose the first multi-terminal routing algorithm for RSFQ circuits that integrates SPL reallocation into the routing stage. The experimental results on 16-bit Sklansky adder show that our proposed algorithm achieves routing completion while reducing the required area. Finally, design challenges for the RSFQ routing problem will be covered.
Tsung-Yi Ho received his Ph.D. in Electrical Engineering from National Taiwan University in 2005. He is a Professor with the Department of Computer Science of National Tsing Hua University, Hsinchu, Taiwan. His research interests include design automation and test for microfluidic biochips and neuromorphic computing systems. He has been the recipient of the Invitational Fellowship of the Japan Society for the Promotion of Science (JSPS), the Humboldt Research Fellowship by the Alexander von Humboldt Foundation, the Hans Fischer Fellowship by the Institute of Advanced Study of the Technische Universität München, and the International Visiting Research Scholarship by the Peter Wall Institute of Advanced Study of the University of British Columbia. He was a recipient of the Best Paper Awards at the VLSI Test Symposium (VTS) in 2013 and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems in 2015. He served as a Distinguished Visitor of the IEEE Computer Society for 2013-2015, a Distinguished Lecturer of the IEEE Circuits and Systems Society for 2016-2017, the Chair of the IEEE Computer Society Tainan Chapter for 2013-2015, and the Chair of the ACM SIGDA Taiwan Chapter for 2014-2015. Currently, he serves as the principal investigator of the AI Research Program of Ministry of Science and Technology in Taiwan, an ACM Distinguished Speaker, and Associate Editor of the ACM Journal on Emerging Technologies in Computing Systems, ACM Transactions on Design Automation of Electronic Systems, ACM Transactions on Embedded Computing Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and IEEE Transactions on Very Large Scale Integration Systems, Guest Editor of IEEE Design & Test of Computers, and the Technical Program Committees of major conferences, including DAC, ICCAD, DATE, ASP-DAC, ISPD, ICCD, etc.
Enquiries: Ms. Shirley Lau at tel. 3943 8439
For more information, please refer to http://www.cse.cuhk.edu.hk/en/events