Date: February 13, 2009 (Friday), 9:30 a.m. - 11:15 a.m
Venue: Room 121, 1/F Ho Sin-hang Engineering Building

9:30-10:20 Surfing on Moore's Law -- strategic aspects of
Microelectronics Research

10:30-10:50 Dynamic Reconfiguration on MPSoCs based on NoCs

10:55-11:15 Utilising Fast Dynamic Reconfiguration for the Design
of Energy-Efficient WSN Mote Architectures

(a)

Title:	Surfing on Moore's Law -- strategic aspects of Microelectronics Research
Date:	February 13, 2009 (Friday)
Time:	9:30 a.m. - 10:20 a.m.
Speaker:	Prof. Dr. Dr. h.c. mult. Manfred Glesner Head of the Institute of Microelectronic Systems, TU Darmstadt

ABSTRACT:

Moore's Law has been the driving force for microelectronics for a long time and still continues to be the motor for researching new technologies, systems, and design automation. This talk examines some of the important current and future challenges and discusses strategic aspects of microelectronic research today.

BIOGRAPHY:

Prof. Dr. Dr. h.c. mult. Manfred Glesner graduated from the Saarland University in Saarbrucken (Germany) in Applied Physics and Electricial Engineering in 1969. In 1975, he received the Ph.D. degree from the same university with research on the application of nonlinear optimization techniques in computer aided design of electronic circuits. From 1975 to 1981 he was a lecturer at the Saarland University in the areas of electronics CAD and control. In 1981 Manfred Glesner was appointed as an Associate Professor for electrical engineering at Darmstadt University of Technology, Germany. In 1989 Darmstadt University conferred him as a Full Professor the new chair of Microelectronics System Design. In 1996 and 1997 he received the honorary doctoral degree from Tallinn Technical University and the University of Bukarest. Since 2000 he is Fellow of the IEEE. Current research work is devoted to advanced design tools for microelectronic and nanoelectronic circuits, system integration on silicon, reconfigurable systems and VLSI architectures for mobile communication systems. He is a member of several technical societies and he is active in organizing international conferences.

(b)

Title:	Dynamic Reconfiguration on MPSoCs based on NoCs
Date:	February 13, 2009 (Friday)
Time:	10:30 a.m. - 10:50 a.m.
Speaker:	M.Sc. Leandro Moller PhD student at the Institute of Microelectronic Systems, TU Darmstadt

ABSTRACT:

New Embedded Systems and Multiprocessor Systems-on-Chip (MPSoCs) have requirements that push their communication infrastructure to its maximum: high communication parallelism among IP cores, high throughput, guaranteed throughput, low power consumption and low area overhead. A unique communication infrastructure able to handle any System-on-Chip or application is a dream. That is why the communication infrastructure should be developed specifically for a given System-on-Chip or application. In this context, Network-on-Chip (NoC) arises as a communication infrastructure alternative that may handle the above Embedded Systems and MPSoCs requirements if the NoC is well tuned. Several parameters can be tuned in order to reach such requirements: routing algorithm, arbitration algorithm, network topology, buffering strategy, flow control scheme, packet length, flit size, buffer depth and others. In some MPSoCs, all these parameters or options to improve the performance of the system/application(s) cannot be present in the hardware all the time due to the high power consumption or area overhead. Dynamic reconfiguration can be an option to be investigated to such cases and in this presentation.

BIOGRAPHY:

Leandro Moller is currently a PhD student at the Technical University of Darmstadt, Germany. He is a member of the Microelectronic Systems group in this same University. He received his master degree (M.Sc.) in Computer Science and his bachalor (B.Sc) in Computer Science, in 2005 and 2003, respectively, both from the Catholic University of Rio Grande do Sul, Brazil. Since 2001 he is also a member of the Hardware Design Support Group (GAPH - www.inf.pucrs.br/~gaph) at Catholic University of Rio Grande do Sul, Brazil. During the summer of 2006, he was an intern at Xilinx Research Labs, San Jose, US. His research interests are partial and dynamical reconfiguration of FPGAs, Networks-on-Chip and High Level Modelling of Systems-on-Chip.

(c)

Title:	Utilising Fast Dynamic Reconfiguration for the Design of Energy-Efficient WSN Mote Architectures
Date:	February 13, 2009 (Friday)
Time:	10:55 a.m. - 11:15 a.m.
Speaker:	Dipl.-Ing. Heiko Hinkelmann PhD student at the Institute of Microelectronic Systems, TU Darmstadt

ABSTRACT:

The success of Wireless Sensor Networks (WSN) relies on the availability of small and efficient embedded system platforms.

While small size and programmability are important cost factors, it is energy consumption which constitutes the most critical design aspect for WSN motes. With the energy budget of a small battery only, long lifetimes of up to several years must be achieved. New architectures are therefore required to meet the desired combination of high energy efficiency, small size, and programmability. For this purpose, we particularly analyse the suitability of a new architecture concept, which features frequent dynamic reconfiguration of a small coarse-grained data path to achieve this goal. A novel reconfiguration mechanisms was developed to allow fast dynamic reconfiguration at low overhead. Overall, the architecture thus achieves large energy savings of more than 75ompared to a regular RISC processor architecture.

BIOGRAPHY:

Heiko Hinkelmann studied Electrical Engineering and Information Technology at Technische University of Darmstadt, Germany, and graduated with honors in 2004. Since then he is Ph.D. student at the Institute of Microelectronic Systems at TUD. His research interests include dynamically reconfigurable architectures, reconfiguration techniques, and wireless sensor networks.

Enquiries: Miss Temmy So at tel 2609 8444

For more information, please refer to http://www.cse.cuhk.edu.hk/seminar