| Title: | Programmable Logic Core Based Post-Silicon Debug For SoCs |
| Date: |
April 1, 2008 (Tuesday)
|
| Time: |
2:30 p.m. - 3:30 p.m.
|
| Venue: |
Room 121, 1/F, Ho Sin-hang Engineering Building,
The Chinese University of Hong Kong, Shatin, N.T. |
| Speaker: |
Prof. Steve Wilton
Associate Professor Department of Electrical and Computer Engineering University of British Columbia Canada |
Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabricated, but do not operate as expected. Providing a means to effectively debug these integrated circuits is vital to help pin-point problems and reduce the number of re-spins required to create a correctly-functioning chip. In this talk, I will show that programmable logic cores (PLCs) and flexible networks can provide this debugging capability. I will elaborate on our PLC based debug infrastructure and summarize our current research. I will also address issues such as defining the debug architecture and debug methodology, determining the expected area overhead, optimizing the interconnect topology, creating a high throughput multi-frequency on-chip network and building efficient interfaces between the PLC and fixed-function logic.
BIOGRAPHY:
Steve Wilton is an Associate Professor in the Department of Electrical and Computer Engineering at the University of British Columbia. He received his B.Eng from the University of Victoria, and his M.A.Sc. and Ph.D. from the University of Toronto. During 2003 and 2004, he was a Visiting Professor in the Department of Computing at Imperial College, London, U.K., and at the Interuniversity MicroElectronics Center (IMEC), Leuven, Belgium. He has also served as a consultant for Cypress Semiconductor and Altera Corporation. He has recently served as the Program Chair and General Chair for the International Symposium on Field-Programmable Gate Arrays, the program co-chair of the International Conference on Field-Programmable Logic and Applications, and is currently the program co-chair of ASAP 2008. His research focuses on the architecture of FPGAs and the CAD tools that target these devices.
Enquiries: Miss Temmy So at tel 2609 8444
For more information, please refer to http://www.cse.cuhk.edu.hk/seminar