Title:	Planning of Network on Chip using Network Flow Approaches
Date:	September 7, 2006 (Thursday)
Time:	2:30 p.m. - 3:30 p.m.
Venue:	Room 121, 1/F, Ho Sin-hang Engineering Building, The Chinese University of Hong Kong, Shatin, N.T.
Speaker:	Professor C.K. Cheng Department of Computer Science and Engineering University of California USA

ABSTRACT:

For the planning of network on chip, communication latency and power consumption are two competing objectives. We unify these two objectives in a multi-commodity flow (MCF) formulation. We implement and optimize the MCF solver using approximation algorithms, which is significantly faster than the commercial linear programming solver CPLEX. Therefore, we can simultaneously optimize network topologies, physical embedding, and interconnect wire styles.

BIOGRAPHY:

Professor C.K. Cheng is currently a professor at the Department of Computer Science and Engineering in the University of California, San Diego, and is an Adjunct Professor at the Department of Electrical and Computer Engineering in the same university. He is also an Honorary Guest Professor at the Department of Computer in Tsinghua University from 2002-08. He has served as a Senior Engineer, Chief Scientist, and Consultant at various System, Design, and Electronic Design Automation Companies. He got his Ph.D. from the Department of Electrical Engineering and Computer Science at the University of California, Berkeley in 1984. He received the IEEE Circuits and Systems Society, CAD Transaction Best Paper Award in 1995 and 2001, the IEEE Fellow in 2000 and the IBM Faculty Award in 2004.

Enquiries: Miss Temmy So at tel 2609 8444

For more information, please refer to http://www.cse.cuhk.edu.hk/seminar