| Title: | Design for Manufacturability |
| Date: |
June 7, 2006 (Wednesday)
|
| Time: |
2:30 p.m. - 3:30 p.m.
|
| Venue: |
Room 121, 1/F, Ho Sin-hang Engineering Building,
The Chinese University of Hong Kong, Shatin, N.T. |
| Speaker: |
Professor Martin D.F. Wong
Department of Electrical and Computer Engineering University of Illinois at Urbana-Champaign USA |
Very large scale integrated circuits (VLSI) are at the heart of modern information and communication systems. With on-chip minimum feature size down to nanometer range, there are substantial challenges to the design and manufacturing of VLSI circuits. In the current 65nm technology node, manufacturing process variations have become a major factor that affects circuit performance and could lead to excessive yield loss. This manufacturability problem will get significantly worse in future technology nodes of 45nm/32nm/22nm and beyond. In order to cope with manufacturing process variations, a major paradigm shift is required in the way we design VLSI circuits. To handle random variations, we need to develop a new generation of computer-aided design (CAD) software that manipulate statistical random variables rather than deterministic values. To handle systematic variations, we need to develop a new generation of CAD software that understand how these variations are compensated during the down-stream manufacturing steps (e.g., OPC for photo-lithography related printing problems, and dummy metal insertion for post-CMP topography variation). In this talk, we give an overview of our contributions in this emerging critical research area of design for manufacturability.
BIOGRAPHY:
Martin D.F. Wong received the B.Sc. degree in mathematics from the University of Toronto and the M.S. degree in mathematics from the University of Illinois at Urbana-Champaign. He obtained the Ph.D. degree in computer science from the University of Illinois at Urbana-Champaign in 1987.
Dr. Wong is currently Professor of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC). Before he joined UIUC, he was a Bruton Centennial Professor of Computer Sciences at the University of Texas at Austin (UT-Austin). Dr. Wong's research interests are computer-aided design (CAD) of very large scaled integrated circuits (VLSI), design and analysis of algorithms, and combinatorial optimization. He has published 300 technical papers and has graduated 32 Ph.D. students.
Dr. Wong received the 2000 IEEE CAD Transactions Best Paper Award for his work on interconnect optimization. He also received best paper awards at DAC-86 and ICCD-95 for his work on floorplan design and routing, respectively. His ICCAD-94 paper on circuit partitioning has been included in the book "The Best of ICCAD - 20 Years of Excellence in Computer Aided Design" published in 2003.
Dr. Wong has served on numerous technical program committees of VLSI CAD conferences. He has served as an Associate Editor for IEEE Transactions on Computer-Aided Design and IEEE Transactions on Computers, and has served as a Guest Editor of four special issues for IEEE Transactions on CAD. He is currently on the Editorial Board of ACM Transactions on Design Automation of Electronic Systems. Dr. Wong is an IEEE Distinguished Lecturer. He is a Fellow of IEEE.
Enquiries: Miss Temmy So at tel 2609 8444
For more information, please refer to http://www.cse.cuhk.edu.hk/seminar