January 14, 2005

Assignment 2: Porting to the Pilchard platform

Objective
Port a GCD core to the Pilchard platform.
Due Day
2005-02-05 23:59
Requirement
You are required to develop a complete GCD processor with necessary software on Pilchard platform. Students are not allowed to modify the pilchard.vhd and must use the gcd_core entity below. 
entity gcd_core is
port (
        clk:    in      std_logic;
        rst:    in      std_logic;
        run:    in      std_logic;
        A:      in      std_logic_vector(15 downto 0);
        B:      in      std_logic_vector(15 downto 0);
        rdy:    out     std_logic;
        err:    out     std_logic;
        D:      out     std_logic_vector(15 downto 0)
);
end entity gcd_core;
All user modules should be placed under the pcore interface. There is no restriction on Host-Pilchard communication protocol although efficient designs are encouraged. As a complete design, your software driver should be able to read two integers from standard input and print the result (in decimal number) to standard output. The following files should be handed in:
report.txt: simple report showing the communication protocol and the performance of your design (speed, area, etc.);
mygcd.c: software driver for GCD processor;
pcore.vhd: the top level user design;
*.vhd: any other VHDL sources used in your design.
The command to run your design is:
./mygcd
Resource:
If you are going to use 2 different clocks in a single design, extra care should be taken. Consider using dual port BlockRAM as an interface in this case.
Marking:
70% correctness of the design (demo required)
10% zero input error detection (err=1 is error)
10% average compute time for random numbers
10% smaller area utilization

Posted by khtsoi at 09:52 AM | Comments (0)