April 06, 2005

Past exam papers

Here are the 2003 and 2004 CEG5010 exam papers for your reference.

Posted by phwl at 09:47 PM | Comments (0)

Week 14: Project Demo

This week we will meet in room 122. Each group should prepare a 10 minute presentation (we will organise an LCD projector and computer) and 10 minute demo regarding their project. Please fill in this report sheet and submit it to me on the day.

Posted by phwl at 10:03 AM | Comments (0)

April 01, 2005

Week 13: Makimoto video

This week we will watch a video in which Dr Makimoto of Sony talks about how reconfigurable computing will be the next paradigm shift.

Posted by phwl at 04:00 PM | Comments (0)

March 26, 2005

Week 12: Elementary functions (CORDIC and STAM methods)

This week we will discuss ways to implement elementary functions such as sin, cos, sqrt etc. The first technique is the CORDIC algorithm (also see the "Computer Arithmetic" chapter in the notes and Ray Andraka's CORDIC webpage, particularly his "A survey of CORDIC algorithms for FPGAs" paper). We will also describe the symmetric table addition method (STAM) (also see the original paper).

Posted by phwl at 11:32 AM | Comments (0)

March 14, 2005

Week 10: Distributed arithmetic and DSP

This week we will talk about the design of filters for digital signal processing. If multipliers are not available, we can use a technique called "distributed arithmetic" to implement a sum of products efficiently (notes and paper).

We will also discuss the implementation of an electronic cochlea which uses distributed arithmetic (notes and paper).

Posted by phwl at 11:17 AM | Comments (0)

March 07, 2005

Week 9: Elliptic Curve Cryptography

Download file

This an example of how to design a microcoded implementation of a complex algorithm. Also refer to this paper.

Posted by phwl at 11:15 AM | Comments (0)

March 01, 2005

Week 8/9: RSA Public Key Cryptography

We will discuss implementations of RSA public key cryptosystems. Also refer to these papers by Shand et. al. and Tang et. al.

Posted by phwl at 12:19 PM | Comments (0)

February 28, 2005

Week 8: The Data Encryption Standard (DES)

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We will talk about the DES algorithm, how to implement it in VHDL and the keysearch engine used to crack it. DES is an example of a datapath which can be fully pipelined.

Posted by phwl at 10:35 AM | Comments (0)

February 21, 2005

Week 7: UART design

This week we will discuss a UART design which is a state machine of moderate complexity. Notes will be distributed in class.

Posted by phwl at 04:23 PM | Comments (0)

February 14, 2005

Week 6: FPGA editor (rm 122)

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This week's lecture will be in SHB Rm 122. We will look at the architecture of the Virtex FPGA using FPGA editor as well as understand how a 34-bit shift register is mapped to the FPGA vhdl code.

Posted by phwl at 09:51 AM | Comments (0)

February 01, 2005

Week 5: (notes changed)

Please note that I've made some changes to the lecture slides in the previous entry for tommorow's lecture. For your convenience, they are also available here.

Posted by phwl at 02:32 PM | Comments (0)

January 31, 2005

Week 5: Shift registers, LFSRs and random numbers

This week we will discuss efficient shift registers (also refer to the Xilinx Applications note XAPP052 "Efficient Shift Registers, LFSR Counters and Long Pseudo-Random Number Generators" and Xilinx Applications note XAPP210 "LFSRs in Virtex devices"). You may also want to use the following programs which can find primitive polynomials of arbitrary degree: a Web based program and/or the ppsearch program, a C program with source code which supports large polynomials.

Posted by phwl at 07:02 AM | Comments (0)

January 25, 2005

New Synplify Pro on Unix platform

For all students:

We have just installed the newest Synplify Pro (7.7.1) synthesis tools in Unix platform. All students can access this software within our department.

Software location:
/opt5/synplify/synplify_771

User environment setup:
csh/tcsh
setenv LM_LICENSE_FILE 1709@ntsvr3
bash/sh
set LM_LICENSE_FILE=1709@ntsvr3

Regards,
Brittle

Posted by khtsoi at 11:35 AM | Comments (0)

January 24, 2005

Week 4: Pilchard Board and Finite State Machines

This week we will discuss the Pilchard board and finite state machines. There is a paper about Pilchard here.

Posted by phwl at 11:41 AM | Comments (0)

January 21, 2005

Some project suggestions

It is recommended (but not mandatory) that projects use either the Microblaze or PowerPC processors so that you can learn about interfacing using the EDK. Some suggestions include the following peripherals:

Posted by phwl at 07:09 PM | Comments (0)

January 17, 2005

Week 3: ASICs vs FPGAs and The density advantage of FPGAs

We will finish discussing the Virtex II architecture and then talk about ASICs vs FPGAs

We will also talk about the Density Advantage of FPGAs (refers to this paper)

Posted by phwl at 02:58 PM | Comments (0)

January 14, 2005

Assignment 2: Porting to the Pilchard platform

Objective
Port a GCD core to the Pilchard platform.
Due Day
2005-02-05 23:59
Requirement
You are required to develop a complete GCD processor with necessary software on Pilchard platform. Students are not allowed to modify the pilchard.vhd and must use the gcd_core entity below. 
entity gcd_core is
port (
        clk:    in      std_logic;
        rst:    in      std_logic;
        run:    in      std_logic;
        A:      in      std_logic_vector(15 downto 0);
        B:      in      std_logic_vector(15 downto 0);
        rdy:    out     std_logic;
        err:    out     std_logic;
        D:      out     std_logic_vector(15 downto 0)
);
end entity gcd_core;
All user modules should be placed under the pcore interface. There is no restriction on Host-Pilchard communication protocol although efficient designs are encouraged. As a complete design, your software driver should be able to read two integers from standard input and print the result (in decimal number) to standard output. The following files should be handed in:
report.txt: simple report showing the communication protocol and the performance of your design (speed, area, etc.);
mygcd.c: software driver for GCD processor;
pcore.vhd: the top level user design;
*.vhd: any other VHDL sources used in your design.
The command to run your design is:
./mygcd
Resource:
If you are going to use 2 different clocks in a single design, extra care should be taken. Consider using dual port BlockRAM as an interface in this case.
Marking:
70% correctness of the design (demo required)
10% zero input error detection (err=1 is error)
10% average compute time for random numbers
10% smaller area utilization

Posted by khtsoi at 09:52 AM | Comments (0)

January 10, 2005

Lecture Notes (version 1)

Download file

Here are some lecture notes which aim to follow the material of the lectures where possible. Sometimes, the best reference is the paper that we are discussing. The examination will be open-notes and you will be able to take these lecture notes, the lecture slides and papers to the examination.

Posted by phwl at 04:06 PM | Comments (0)

Week 2: Xilinx Virtex Architecture

Download file

You may also wish to refer to the Virtex-E datasheet and the
Product Selection Guide at Xilinx's site.

Posted by phwl at 03:49 PM | Comments (0)

Week 1: Introduction

Download file

Also read
Compton and Hauck, "Reconfigurable Computing: A Survey of Systems and Software," and Vuillemin et. al., "Programmable active memories: reconfigurable systems come of age"


Posted by phwl at 03:40 PM | Comments (0)

January 09, 2005

Welcome

Welcome to the new CEG5010 website. This year (2005), all materials will be updated via this weblog.

Assessment scheme will be 10% tutorials 50% project 40% examination (must get >50% in final to pass course).

You can still access last year's material at the old site

Posted by phwl at 04:44 PM | Comments (0)

Welcome

Welcome to the new CEG5010 website. This year (2005), all materials will be updated via this weblog.

Assessment scheme will be 10% tutorials 50% project 40% examination (must get >50% in final to pass course).

You can still access last year's material at the old site

Posted by phwl at 04:44 PM | Comments (0)