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February 28, 2005
Week 8: The Data Encryption Standard (DES)
We will talk about the DES algorithm, how to implement it in VHDL and the keysearch engine used to crack it. DES is an example of a datapath which can be fully pipelined.
Posted by phwl at 10:35 AM | Comments (0)
February 21, 2005
Week 7: UART design
This week we will discuss a UART design which is a state machine of moderate complexity. Notes will be distributed in class.
Posted by phwl at 04:23 PM | Comments (0)
February 15, 2005
Week 6: RC4 implementation
We will discuss an implementation of the RC4 cipher. You may also wish to refer to this paper.
Posted by phwl at 02:35 PM | Comments (0)
February 14, 2005
Week 6: FPGA editor (rm 122)
Download slidesThis week's lecture will be in SHB Rm 122. We will look at the architecture of the Virtex FPGA using FPGA editor as well as understand how a 34-bit shift register is mapped to the FPGA vhdl code.
Posted by phwl at 09:51 AM | Comments (0)
February 01, 2005
Week 5: (notes changed)
Please note that I've made some changes to the lecture slides in the previous entry for tommorow's lecture. For your convenience, they are also available here.
Posted by phwl at 02:32 PM | Comments (0)