CEG3420 Computer Design
General
Lecture Notes
- Lecture 1: Introduction ( 2up postscript,
powerpoint)
- Lecture 2: Instruction set architectures ( 2up postscript,
powerpoint)
- Lecture 3: Performance ( 2up postscript, powerpoint)
- Lecture 4: MIPS ISA ( 2up postscript, powerpoint)
- Lecture 5: Delay Modelling ( 2up postscript, powerpoint)
- Lecture 6: Design Process and Cost (ALU) ( 2up postscript, powerpoint)
- Lecture 7: Multiply and Shifters ( 2up postscript, powerpoint)
- Lecture 8: Divide and Floating point ( 2up postscript, powerpoint)
- Lecture 9: Single Cycle CPU Design ( 2up postscript, powerpoint)
-
Lecture 9.2: Single Cycle Control Design ( 2up postscript, powerpoint)
-
(NOT COVERED IN LECTURES - PLEASE REVIEW YOURSELF)
Lecture 9.5: Multiple Cycle CPU Design ( 2up postscript, sorry no powerpoint)
- Lecture 10: Multiple Cycle CPU Design ( 2up postscript, powerpoint)
- Lecture 11: Multiple Cycle Control and Exceptions ( 2up postscript, powerpoint)
- Lecture 12: (removed)
-
Lecture 13: Pipelining ( 2up postscript, powerpoint)
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Lecture 14: Pipeline hazards and Control ( 2up postscript - sorry no powerpoint).
NOT COVERED More pipelining ( 2up postscript, powerpoint)
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Lecture 15: Locality and Memory Technology ( 2up postscript, powerpoint)
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Lecture 16: Caches and Virtual Memory ( 2up postscript, powerpoint)
- Lecture 17: Virtual memory notes
- Lecture 18: Bus Design ( 2up postscript, powerpoint)
- Lecture 19:
PC Technology
Tutorials
Tutorial time is W5 in MMW703.
Other Material