Seminar
Speaker:
Lucifer Chu (朱學恆), Founder of the OOPS
Date:
29 March, 2008
Time:
2:00pm to 3:30pm
Venue:
Lecture Theatre 14, Academic Building, City University of Hong
Kong, Kowloon Tong
Language:
Mandarin

Casual Meeting
Date:
29 March, 2008 (Saturday)
Time:
5:30pm to 7:30pm (Light dinner will be provided)
Venue:
iResources Centre, IT Street, Level 3, Cyberport 3, 100
Cybeport Road Hong Kong

Registration
Please email to rsvp@hk.creativecommons.org

Information
Link

Speaker:
Prof. Mahesan Niranjan
Department of Computer Science, The University of Sheffield

Date:
Monday, 5 November 2007

Time:
11:00 am - 12:00 noon

Venue:
CYC603, 6/F, Chow Yei Ching Building,
Dept. of Electrical and Electronic Engineering,
The University of Hong Kong

Information:
Download file

Best regards,

Contact : Prof. David Feng from PolyU.

You are invited to attend the following Discussion Forum jointly
organized by IEEE HK CAS/COM Chapter and IEEE HK Computer
Chapter, sponsored by the Department of Computer Science, CityU.

Discussion Forum - Copyright Protection in the Digital Environment

Chaired by Jerome Liu, IEEE HK CAS/COM Chapter Chairman, Barrister-at-Law

Date : 09 February 2007, (Friday)
Time : 6:30 – 7:30 pm (Refreshment 6:10 pm)
Venue : P4703, Academic Building, City University of Hong Kong
Fee : Free of Charge
Details : http://www.ieee.org.hk/newsletter/event/070209df.doc

The forum aims to provide you an overview on the current and new
legislation. You can also express your views and comments in the
consultation which will lead to a new legislation.

Date : 15 January 2007 (Monday)
Time : 2:30pm ~ 4:00pm
Venue : UC 3402, 34/F., United Centre, HKU SPACE, Admiralty, Hong Kong
Fee : Free-of-charge
Details : http://www.iproa.org/web/Newsletter/files/Invitiation%20to%20members_070115_Final.pdf

Registration : Please indicate your attendance to the Seminar by email at iproa@iproa.org or call at 2778-0040

Speaker : Andrew K.C. Wong
Pattern Intelligence Inc. and
Systems Design Engineering, University of Waterloo

Date : 11 December 2006 (Monday)

Time : 2:30 p.m. ¡V 3:30 p.m.

Venue : PQ703, Department of Computing,
The Hong Kong Polytechnic University

Abstract:
A basic task of machine learning and data mining is to automatically uncover patterns that reflect regularities in a data set. Today, data contents become more complex and diverse. They usually contain both nominal and ordinal data. Interesting information and relevant patterns might be scattered, entangled and spanning in various data subspaces. In the past, we have developed an algorithm known as Pattern Discovery to discover statistically significant patterns
effectively wherever they are in the database. Recently, we have developed a new method known as Pattern Clustering and Data Grouping (PCDG) which is able to cluster similar patterns into pattern clusters while grouping pattern-induced data into data groups. In that sense data associated with similar statistical patterns or rules are automatically organized into groups. Then the probabilistic characteristics of patterns in each data group and the relationship among them can be revealed.

PCDG takes a data set and the association patterns discovered by either pattern discovery or association rule mining as inputs. It induces a data group located in the data set for each association pattern. Using a similarity measure between data groups, it applies a clustering algorithm to simultaneously cluster similar association patterns and group the respective pattern-induced data into data groups. Data groups induced usually span different subspaces and could overlap each other if they contain common parts of the discovered patterns. Clustering terminates based on a stopping criterion. After pattern clustering and data grouping, the probabilistic characteristics of each data groups can be explicitly displayed. PGDG can further discover and represents the structural relations among data groups in the form of attributed hypergraphs, revealing the similarity and differences among data groups. Hence, knowledge trapped in the data can be unveiled and organized for interpretation and understanding. In the talk, supporting experiments on synthetic and real-world data, including automatic discovery of gene expression subgroups from microarray data of cancerous tissues and DNA splicing classes in DNA sequences will be reported.

Highlight of IS Summit 2006:

The Information Security Summit is a regional event with the aim to
provide IT professional with practical and advanced insights into
information security. Following the success of the event organized in
the previous three years , this year's Summit will include a one-day
conference and a number of workshops demonstrating management and
technical theory , applications and practical experiences on various
aspects of information security, IT fraud and forensics topics .
Experts, local and overseas, in the subject areas are invited to share
their experience and knowledge. The following is this year's programme
highlight:

* Keynote Speech: Emerging Cybercrime Trends and Enforcement Approaches
Mr. Raul O. Roldan, Acting Deputy Assistant Director,
Federal Bureau of Investigation (FBI), Cyber Division (USA)

* A CISO's Guide to Ethical Hacking
Mr. David Rhoades, Maven Security Consulting Inc.

* Evolving Trends In Online Fraud
Mr. Jean-Francois Legault, Senior Manager, Analytic & Forensic
Technology, Deloitte & Touche LLP.

* Forensic Investigations Across the Network – Challenging Existing
Forensic Principles
Mr. Frank Butler, Director of Business Development Training
Division, Guidance Software.

* Mobile Device Forensic Tools
Mr. Kevin Mansell, Course Manager, Centre for National High Tech
Crime Training, Centrex (UK).

* Why Organisations Fail To Leverage From Their Investment In IT
Infrastructure
Mr. Ken Doughty, Risk Management Corporate and Finance, ING
Australia. IS Summit Secretariat

Date:
2 Nov. 2006 (Thur.)

Time:
5:00 p.m. - 6:00 p.m.

Venue:
CYC603, 6/F, Chow Yei Ching Building,
Dept. of Electrical and Electronic Engineering,
The University of Hong Kong

Abstract:
Pairwise scoring kernels have been used extensively in biological sequence classification because of their effectiveness in converting variable-length sequences into fixed-length vectors. However, the pairwise approach can result in feature vectors with dimension equal to the training set size, causing the curse of dimensionality. This difficulty calls for feature selection methods that can weed out irrelevant features to reduce training and recognition time. To this end, we propose to use the full-feature column vectors of a pairwise scoring matrix to train an SVM and select the feature dimensions (rows) based on its support vectors. The idea is based on the notion that support vectors are important for classification and pairwise scoring matrices are symmetric. As a result, the transpose of support vectors can be considered as important features for classification. We refer to this approach as vector-index-adaptive SVM (VIA-SVM) and compare its performance with other feature selection schemes---including SVM-RFE, R-SVM, and a Fisher-based method---in protein subcellular localization. It was found that VIA-SVM is insensitive to the penalty factor in SVM training and can avoid the need to set a cutoff point for stopping the feature selection process.

About the Speaker:
Sun-Yuan Kung was born in Taiwan on January 2, 1950. He received the B.S. in Electrical Engineering from the National Taiwan University in 1971; M.S. in Electrical Engineering from the University of Rochester in 1974; and Ph.D. in Electrical Engineering from Stanford University in 1977. From 1977 to 1987, he was on the faculty of Electrical Engineering-Systems at the University of Southern California. In 1984, he was a Visiting Professor at Stanford University and later in the same year, a visiting professor at the Delft University of Technology. Since September 1987, he has been a Professor in the Department of Electrical Engineering, Princeton University. He currently serves on the IEEE Technical Committees on VLSI Signal Processing and Neural Networks and an Editor-in-Chief of Journal of VLSI Signal Processing.

Enquiries:
Please contact Dr. C.Q. Chang, Department of Electrical and Electronic Engineering, The University of Hong Kong (Email: cqchang@eee.hku.hk)

Fee:
Free of Charge

ABSTRACT:
Design automation has a long history: the first Design Automation Workshop, which evolved into the Design Automation Conference, took place more than 40 years ago. While much success has been achieved in the last 40 years, the automatic development of optimised designs remains a key challenge.

This talk describes recent work at Imperial College London on design automation of configurable processors, which are often based on field-programmable gate array technology. Our aim is to produce, from a high-level description, optimised implementations that are competitive in speed, size, or power consumption.

Two research themes will be presented. The first theme involves the guided optimisation of high-level programs targeting configurable datapaths, based on source-level transformation. The second theme involves techniques for producing multi-threaded processors with customisable instruction sets. Several examples will be used to illustrate these approaches.

BIOGRAPHY:
Wayne Luk is Professor of Computer Engineering in Department of Computing at Imperial College London. He founded and leads the Computer Systems Section. His research interests include computer architecture, configurable computing, and design automation.

Enquiries:
Miss Temmy So at tel 2609 8444

Fee:
Free of Charge

ABSTRACT:
Advances in FPGA-based reconfigurable computers have made them very attractive computing platforms for a vast variety of computation demanding areas such as bioinformatics, speech recognition, network security and high-end digital signal processing. The lack of common and intuitive operating system support, however, hinders their wide deployments.

In this talk, I will present BORPH, an operating system framework for FPGA-based reconfigurable computers with a goal to ease and accelerate development of high-level applications to run on these computers. It provides kernel support for FPGA resources by extending a standard Linux operating system. Users therefore compile and execute hardware processes on FPGA resources the same way they run software processes on conventional processor-based systems. BORPH offers run-time general file system support to hardware processes as if they were software. Furthermore, a virtual file system is built to allow access to memories and registers defined in the FPGA, which provides communication links between hardware and software.

Since the introduction of BORPH to our FPGA-based platform, BEE2, we have observed increased productivity among high-level application developers, who have few previous experience in hardware design. I will also briefly describe our Simulink-based design flow that our applications are developed with, and how it is integrated with BORPH.

BIOGRAPHY:
Hayden So is a Ph.D. candidate in the department of Electrical Engineering and Computer Science (EECS) at University of California, Berkeley. His research focuses in operating system design for reconfigurable computers, computer architecture and hardware/software codesign methodology.

Date:
28 July 2006 (Fri.)

Time:
4:30 p.m. - 5:30 p.m.

Venue:
CYC603, 6/F, Chow Yei Ching Building,
Dept. of Electrical and Electronic Engineering,
The University of Hong Kong

Fee :
Free of charge

For more details:
http://www.cse.cuhk.edu.hk/~ieee/seminars/sykung_seminar20060728.doc