Research Excellence

Mr. Liang Wang won the Best Paper Award in VLSI-SoC'14

Congratulations to Mr. WANG Liang, a Ph.D. student supervised by Prof. Terrence Mak, won the Best Paper Award in the 22nd IFIP/IEEE International Conference on VLSI and System-on-Chip (VLSI-SoC 2014). The paper entitled "Dynamic Programming-Based Lifetime Aware Adaptive Routing Algorithm for Network-on-Chip".

 

Abstract

Technology scaling leads to the reliability issue as a primary concern in Network-on-Chip (NoC) design. Due to the routing algorithms, some routers may age much faster than others, which becomes a bottleneck for system lifetime. In this paper, lifetime is modeled as a resource consumed over time. A metric lifetime budget is associated with each router, indicating the maximum allowed workload for current period. Since the heterogeneity in router lifetime reliability has strong correlation with the routing algorithm, we define a problem to optimize the lifetime by routing flits along the path with maximum lifetime budgets. A dynamic programming-based lifetime aware routing algorithm is proposed based on the lifetime budget metric. The dynamic programming network approach is employed to solve this problem with linear complexity. The experimental results show that the lifetime aware routing has around 20%, 45%, 55% minimal MTTF improvement than XY routing, NoP routing, oddeven routing, respectively.