卓越研究

鄒振德同學、徐儷瑄同學及梁恆惠教授榮獲FPT'05最優秀論文獎

來自香港中文大學計算機科學與工程學系的鄒振德同學、徐儷瑄同學及梁梁恆惠教授,與來自倫敦帝國學院的W. Luk及英屬哥倫比亞大學的S. Wilson合著的論文,於在新加坡舉行的電機及電子工程師學會現場可程式技術國際會議(FPT 2005),奪得最優秀論文獎。得獎論文名為「用於商業現場可程式邏輯門陣列(FPGA)的動態電壓調節策略」(Dynamic Voltage Scaling for Commercial FPGAs),提出了一種方法學以減少商業現場可程式邏輯門陣列(FPGA)裝置之能源消耗。

 

論文摘要:

A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter chain for various operating conditions at run time. A desired LDMC value, intended to match the critical path of the operating circuit plus a safety margin, is then chosen; a closed loop control scheme is used to maintain the desired LDMC value as chip temperature changes, by automatically adjusting the voltage applied to the FPGA. We describe experiments using this technique on various circuits at different clock frequencies and temperatures to demonstrate its utility and robustness. Power savings between 4% and 54% for the Vint supply are observed.