|Title:||Illuminating Many-Core Architectures with Silicon Photonic Interconnects|
|Date:||July 31, 2017 (Monday)|
|Time:||11:00 a.m. - 12:00 n.n.|
|Venue:||Room 121, 1/F, Ho Sin-hang Engineering Building,
The Chinese University of Hong Kong,
|Speaker:||Prof. Sebastien Le Beux
Ecole Centrale de Lyon
University of Lyon, France
The move to high performance many-cores architectures requires organized high-speed communication between processors. Silicon photonic interconnects are emerging as potential contenders to solve congestion and latency issues in future computing architectures. However, the design of such highly heterogeneous system requires complex design space exploration taking into account thermal sensitivity of optical devices, BER requirements and energy/performances objectives. In this talk, I will introduce key design flow features to optimize the execution of applications onto nanophotonic interconnect based 3D MPSoC.
Sebastien Le Beux is Associate Professor for Heterogeneous and Nanoelectronics Systems Design at Ecole Centrale de Lyon, University of Lyon. He is currently responsible for nanoprocessors research activities at the Heterogeneous System Design group of the Lyon Institute of Nanotechnology. He obtained his PhD in Computer Science from the University of Sciences and Technology of Lille in 2007. He went on to become a postdoctoral researcher at Ecole Polytechnique de Montréal, Canada 2008-2010. His research interests include design methods for emerging (nano)technologies and embedded systems, including silicon photonic interconnect and reconfigurable architectures. He has authored or co-authored over 70 scientific publications including journal articles, book chapters, patent and conference papers and held pivotal positions in the organization of various international conferences. He is a general chair of the OPTICS workshop.
Enquiries: Ms Ricola Lo at tel 3943 8439
For more information, please refer to http://www.cse.cuhk.edu.hk/seminar.