Title:Neural Networks on Chip: From CMOS Accelerators to In-Memory-Computing
Date: October 03, 2018 (Wednesday)
Time: 3:00 pm - 4:00 pm
Venue: Room 121, 1/F, Ho Sin-hang Engineering Building, The Chinese University of Hong Kong, Shatin, N.T.
Speaker: Prof. Yu WANG
Tenured Associate Professor
Department of Electronic Engineering
Tsinghua University

ABSTRACT:

Artificial neural networks, which dominate artificial intelligence applications such  as object recognition and speech recognition, are in evolution. To apply neural networks to wider applications, customized hardware are necessary since CPU and GPU are not efficient enough. Numerous architectures are proposed in the past 4 years to boost the energy efficiency of deep learning inference processing, including Tsinghua and Deephi’s effort. In this talk, we will talk about different architectures based on CMOS technologies, including 200GOPS/W FPGA accelerators, about 1-5TOPS/W chips with DDR subsystems, and over 50TOPs/W chips with everything on chip. The possibilities and trends of adopting emerging NVM technology for efficient learning systems, i.e., in-memory-computing, will also be discussed as one of the most promising ways to improve the energy efficiency.

https://nicsefc.ee.tsinghua.edu.cn/projects/neural-network-accelerator/

 

BIOGRAPHY:

Yu Wang received his B.S. degree in 2002 and Ph.D. degree (with honor) in 2007 from Tsinghua University, Beijing. He is currently a Tenured Associate Professor with the Department of Electronic Engineering, Tsinghua University. His research interests include brain inspired computing, application specific hardware computing, parallel circuit analysis, and power/reliability aware system design methodology. Dr. Wang has authored and coauthored over 200 papers in refereed journals and conferences. He has received Best Paper Award in FPGA 2017, NVMSA17, ISVLSI 2012, and Best Poster Award in HEART 2012 with 9 Best Paper Nominations. He is a recipient of  DAC Under-40 Innovator Award in 2018 and IBM X10 Faculty Award in 2010. He served as TPC chair for ISVLSI 2018, ICFPT 2011 and Finance Chair of ISLPED 2012-2016, and served as program committee member for leading conferences in these areas, including top EDA conferences such as DAC, DATE, ICCAD, ASP-DAC, and top FPGA conferences such as FPGA and FPT. Currently he serves as Co-EIC for SIGDA E-Newsletter, Associate Editor for IEEE Trans on CAS for Video Technology, IEEE Transactions on CAD, and Journal of Circuits, Systems, and Computers. He also serves as guest editor for Integration, the VLSI Journal and IEEE Transactions on Multi-Scale Computing Systems. He is a recipient of NSF China Excellent Young Scholar, and is now serving as ACM distinguished speaker. He is an IEEE/ACM senior member.  He is the co-founder of Deephi Tech (acquired by Xilinx), which is a leading deep learning computing platform proider.

 

Enquiries: Ms. Crystal Tam at tel. 3943 8439

For more information, please refer to http://www.cse.cuhk.edu.hk/en/events

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